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Fri, 06 Nov 2026 17:02:00 -0800 (PST) Received: from [127.0.0.1] ([109.77.115.215]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4b7e3291531sm24526375e9.15.2026.11.06.17.02.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Nov 2026 17:02:00 -0800 (PST) From: bryan.odonoghue@linaro.org X-Google-Original-From: bod@kernel.org Date: Sat, 07 Nov 2026 01:01:48 +0000 Subject: [PATCH v3 05/11] media: qcom: camss: csid-680: Enable RDI SOF tracking X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20261107-v4l2-frame-sync-v3-5-e5bf7073a35d@kernel.org> References: <20261107-v4l2-frame-sync-v3-0-e5bf7073a35d@kernel.org> In-Reply-To: <20261107-v4l2-frame-sync-v3-0-e5bf7073a35d@kernel.org> To: Bryan O'Donoghue , Vladimir Zapolskiy , Loic Poulain , Mauro Carvalho Chehab Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Bryan O'Donoghue X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; 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a=openpgp; fpr=E693FB2AABA36DE117AB6FB422713BB3A18DC83A From: Bryan O'Donoghue Similarly to the sm8650 we can quite easily switch on V4L2_EVENT_FRAME_SYNC for x1e/x2e which uses csid-680. Do so now. Signed-off-by: Bryan O'Donoghue Reviewed-by: Loic Poulain Signed-off-by: Bryan O'Donoghue --- drivers/media/platform/qcom/camss/camss-csid-680.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/media/platform/qcom/camss/camss-csid-680.c b/drivers/media/platform/qcom/camss/camss-csid-680.c index 345a67c8fb947..452640e72f6d5 100644 --- a/drivers/media/platform/qcom/camss/camss-csid-680.c +++ b/drivers/media/platform/qcom/camss/camss-csid-680.c @@ -296,6 +296,20 @@ static void __csid_configure_rdi_stream(struct csid_device *csid, u8 enable, u8 writel(val, csid->base + CSID_RDI_CFG0(port)); } +static void __csid_configure_rdi_irq(struct csid_device *csid, u8 enable, u8 rdi) +{ + u32 val; + + val = readl(csid->base + CSID_CSI2_RDIN_IRQ_MASK(rdi)); + + if (enable) + val |= CSID_CSI2_RDIN_INFO_INPUT_SOF; + else + val &= ~CSID_CSI2_RDIN_INFO_INPUT_SOF; + + writel(val, csid->base + CSID_CSI2_RDIN_IRQ_MASK(rdi)); +} + static void csid_configure_stream(struct csid_device *csid, u8 enable) { int i; @@ -307,6 +321,7 @@ static void csid_configure_stream(struct csid_device *csid, u8 enable) if (csid->phy.en_vc & BIT(i)) { __csid_configure_rdi_stream(csid, enable, i, 0); __csid_configure_rx(csid, &csid->phy, 0); + __csid_configure_rdi_irq(csid, enable, i); __csid_ctrl_rdi(csid, enable, i); } } @@ -395,6 +410,9 @@ static irqreturn_t csid_isr(int irq, void *dev) if (val) writel(val, csid->base + CSID_CSI2_RDIN_IRQ_CLEAR(i)); + if (val & CSID_CSI2_RDIN_INFO_INPUT_SOF) + csid_sof_event(csid, i); + if (val & CSID_CSI2_RDIN_RUP_DONE) csid_rup_complete(csid, i); -- 2.56.0