Linux ARM-MSM sub-architecture
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From: Md Sadre Alam <quic_mdalam@quicinc.com>
To: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: <vkoul@kernel.org>, <robin.murphy@arm.com>,
	<linux-arm-msm@vger.kernel.org>, <dmaengine@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <quic_varada@quicinc.com>,
	<quic_srichara@quicinc.com>
Subject: Re: [PATCH v2] dmaengine: qcom: bam_dma: Fix BAM_RIVISON register handling
Date: Mon, 20 Jan 2025 11:55:25 +0530	[thread overview]
Message-ID: <211df2ed-0e01-ccb5-ca3d-1d021361ea5e@quicinc.com> (raw)
In-Reply-To: <20250119054105.rhsathhdqapirszh@thinkpad>



On 1/19/2025 11:11 AM, Manivannan Sadhasivam wrote:
> On Fri, Jan 17, 2025 at 04:43:02PM +0530, Md Sadre Alam wrote:
>> This patch resolves a bug from the previous commit where the
>> BAM_DESC_CNT_TRSHLD register was conditionally written based on BAM-NDP
>> mode. It also fixes an issue where reading the BAM_REVISION register
> 
> The 'also' sounds like the patch is fixing 2 issues, but it is just fixing one.
Will update the commit message in next revision.
> 
>> would hang if num-ees was not zero, which occurs when the SoCs power on
>> BAM remotely. The BAM_REVISION register read has been moved to inside if
>> condition.
>>
>> Cc: stable@vger.kernel.org
> 
> The offending commit is just in the -next branch. So CCing stable is pointless.
Ok, will remove in next revision.
> 
> - Mani
> 

      reply	other threads:[~2025-01-20  6:25 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-17 11:13 [PATCH v2] dmaengine: qcom: bam_dma: Fix BAM_RIVISON register handling Md Sadre Alam
2025-01-19  5:41 ` Manivannan Sadhasivam
2025-01-20  6:25   ` Md Sadre Alam [this message]

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