From: Timur Tabi <timur@codeaurora.org>
To: Linus Walleij <linus.walleij@linaro.org>,
Stephen Boyd <sboyd@codeaurora.org>
Cc: Andy Gross <andy.gross@linaro.org>,
David Brown <david.brown@linaro.org>,
anjiandi@codeaurora.org,
Bjorn Andersson <bjorn.andersson@linaro.org>,
"linux-gpio@vger.kernel.org" <linux-gpio@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-arm-msm@vger.kernel.org" <linux-arm-msm@vger.kernel.org>,
"thierry.reding@gmail.com" <thierry.reding@gmail.com>,
Mika Westerberg <mika.westerberg@linux.intel.com>,
Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Subject: Re: [PATCH 0/2] [v5] pinctrl: qcom: add support for sparse GPIOs
Date: Mon, 16 Oct 2017 08:42:41 -0500 [thread overview]
Message-ID: <22ef3c75-bdf6-6aeb-a1dd-2d03eb46fd58@codeaurora.org> (raw)
In-Reply-To: <CACRpkdYis3kNG45zmkTcP8vCutfRJkh5UjnzwFVeyLmFYFEC-A@mail.gmail.com>
On 10/14/2017 05:43 PM, Linus Walleij wrote:
> So I guess the driver needs to know what pin registers it can't
> access so the user does not get a gun to shoot in the foot with.
>
> If we augment gpiolib to just handle -EACCES or something
> (-EIO?) from the driver .get_direction() callback for these lines,
> things should be smooth?
You mean like this:
diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c
b/drivers/pinctrl/qcom/pinctrl-msm.c
index ff491da64dab..ca4ae3d76eb4 100644
--- a/drivers/pinctrl/qcom/pinctrl-msm.c
+++ b/drivers/pinctrl/qcom/pinctrl-msm.c
@@ -443,6 +443,14 @@ static int msm_gpio_get_direction(struct gpio_chip
*chip, unsigned int offset)
g = &pctrl->soc->groups[offset];
+ /*
+ * During initialization, gpiolib may query all GPIOs for their
+ * initial direction, regardless if they exist, so block access
+ * to those that are unavailable.
+ */
+ if (!g->npins)
+ return -ENODEV;
+
val = readl(pctrl->regs + g->ctl_reg);
/* 0 = output, 1 = input */
This is what I have in my patch already. I can return any error message
you like, but -ENODEV already works.
The problem is that it's insufficient. I also want the non-available
GPIOs to be as absent as possible. I don't want them to show up in
/sys/kernel/debug/gpio, and I don't want to be able to create them via
/sys/class/gpio/export.
--
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm
Technologies, Inc. Qualcomm Technologies, Inc. is a member of the
Code Aurora Forum, a Linux Foundation Collaborative Project.
next prev parent reply other threads:[~2017-10-16 13:42 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-07 15:33 [PATCH 0/2] [v5] pinctrl: qcom: add support for sparse GPIOs Timur Tabi
2017-09-07 15:33 ` [PATCH 1/2] [v5] pinctrl: qcom: disable GPIO groups with no pins Timur Tabi
2017-10-02 17:44 ` Bjorn Andersson
2017-10-02 20:47 ` Timur Tabi
2017-10-07 11:07 ` Linus Walleij
2017-10-13 23:35 ` Timur Tabi
2017-10-19 22:44 ` Timur Tabi
2017-10-16 8:01 ` Thierry Reding
2017-10-16 13:52 ` Timur Tabi
2017-09-07 15:33 ` [PATCH 2/2] [v3] pinctrl: qcom: qdf2xxx: add support for new ACPI HID QCOM8002 Timur Tabi
2017-09-08 12:50 ` [PATCH 0/2] [v5] pinctrl: qcom: add support for sparse GPIOs Linus Walleij
2017-09-13 17:09 ` Timur Tabi
2017-09-19 7:04 ` Stephen Boyd
2017-09-19 8:15 ` Linus Walleij
2017-09-19 12:32 ` Timur Tabi
2017-09-20 11:43 ` Linus Walleij
2017-09-20 13:04 ` Timur Tabi
2017-09-21 12:08 ` Linus Walleij
2017-09-21 12:12 ` Timur Tabi
2017-09-22 13:29 ` Linus Walleij
2017-09-22 13:37 ` Timur Tabi
2017-10-03 22:03 ` Stephen Boyd
2017-10-03 22:12 ` Timur Tabi
2017-10-04 21:50 ` Stephen Boyd
2017-10-04 22:41 ` Timur Tabi
2017-10-05 21:30 ` Stephen Boyd
2017-10-11 7:51 ` Linus Walleij
2017-10-12 7:39 ` Stephen Boyd
2017-10-14 22:43 ` Linus Walleij
2017-10-16 13:42 ` Timur Tabi [this message]
2017-10-13 23:26 ` Timur Tabi
2017-10-15 20:18 ` Thierry Reding
2017-10-15 21:09 ` Timur Tabi
2017-10-02 16:02 ` Timur Tabi
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