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Mon, 3 Apr 2023 22:13:02 GMT Received: from [10.71.110.193] (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Mon, 3 Apr 2023 15:13:01 -0700 Message-ID: <2686a406-784e-a212-8e7e-e479a0019d7e@quicinc.com> Date: Mon, 3 Apr 2023 15:13:01 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.8.0 Subject: Re: [Freedreno] [PATCH RFC v2 4/6] drm/msm/dpu: Fix slice_last_group_size calculation Content-Language: en-US To: Dmitry Baryshkov , CC: , Abhinav Kumar , , Konrad Dybcio , Rob Clark , Daniel Vetter , Marijn Suijten , Sean Paul References: <20230329-rfc-msm-dsc-helper-v2-0-3c13ced536b2@quicinc.com> <20230329-rfc-msm-dsc-helper-v2-4-3c13ced536b2@quicinc.com> From: Jessica Zhang In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: ftm9j1PHqfiWWtvycI7oaJgORO07u2tf X-Proofpoint-GUID: ftm9j1PHqfiWWtvycI7oaJgORO07u2tf X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-04-03_17,2023-04-03_03,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 lowpriorityscore=0 suspectscore=0 bulkscore=0 spamscore=0 mlxlogscore=999 adultscore=0 impostorscore=0 mlxscore=0 priorityscore=1501 clxscore=1015 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2304030176 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 4/3/2023 2:51 PM, Dmitry Baryshkov wrote: > On 04/04/2023 00:45, Jessica Zhang wrote: >> >> >> On 4/2/2023 4:27 AM, Dmitry Baryshkov wrote: >>> On 31/03/2023 21:49, Jessica Zhang wrote: >>>> Correct the math for slice_last_group_size so that it matches the >>>> calculations downstream. >>>> >>>> Fixes: c110cfd1753e ("drm/msm/disp/dpu1: Add support for DSC") >>>> Signed-off-by: Jessica Zhang >>>> Reviewed-by: Dmitry Baryshkov >>>> --- >>>>   drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c | 6 +++++- >>>>   1 file changed, 5 insertions(+), 1 deletion(-) >>>> >>>> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c >>>> b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c >>>> index b952f7d2b7f5..9312a8d7fbd9 100644 >>>> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c >>>> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c >>>> @@ -56,7 +56,11 @@ static void dpu_hw_dsc_config(struct dpu_hw_dsc >>>> *hw_dsc, >>>>       if (is_cmd_mode) >>>>           initial_lines += 1; >>>> -    slice_last_group_size = 3 - (dsc->slice_width % 3); >>>> +    slice_last_group_size = dsc->slice_width % 3; >>>> + >>>> +    if (slice_last_group_size == 0) >>>> +        slice_last_group_size = 3; >>> >>> Hmm. As I went on checking this against techpack: >>> >>> mod = dsc->slice_width % 3 >>> >>> mod | techpack | old | your_patch >>> 0   | 2        | 3   | 3 >>> 1   | 0        | 2   | 1 >>> 2   | 1        | 1   | 2 >>> >>> So, obviously neither old nor new code match the calculations of the >>> techpack. If we assume that sde_dsc_helper code is correct (which I >>> have no reasons to doubt), then the proper code should be: >>> >>> slice_last_group_size = (dsc->slice_width + 2) % 3; >>> >>> Could you please doublecheck and adjust. >> >> Hi Dmitry, >> >> The calculation should match the techpack calculation (I kept the >> `data |= ((slice_last_group_size - 1) << 18);` a few lines down). > > And the techpack doesn't have -1. > > I think the following code piece would be more convenient as it is simpler: > > slice_last_group_size = (dsc->slice_width + 2) % 3; > [...] > data |= slice_last_group_size << 18; > > If you agree, could you please switch to it? Sure. Thanks, Jessica Zhang > >> >> Thanks, >> >> Jessica Zhang >> >>> >>>> + >>>>       data = (initial_lines << 20); >>>>       data |= ((slice_last_group_size - 1) << 18); >>>>       /* bpp is 6.4 format, 4 LSBs bits are for fractional part */ >>>> >>> >>> -- >>> With best wishes >>> Dmitry >>> > > -- > With best wishes > Dmitry >