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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b8dbf1c5b23sm247562466b.57.2026.01.29.03.56.10 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 29 Jan 2026 03:56:12 -0800 (PST) Message-ID: <26e2aa8a-912b-4e83-ad00-130cc137aa4b@oss.qualcomm.com> Date: Thu, 29 Jan 2026 12:56:09 +0100 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] arm64: dts: qcom: sm8550: Update EAS properties To: Lukasz Luba , Viresh Kumar Cc: webgeek1234@gmail.com, Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Viresh Kumar , "Rafael J. Wysocki" , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Xilin Wu References: <20260128-sm8550-eas-v1-1-fb80615bed5c@gmail.com> <76c24508-bb75-475a-b973-d7ad18c302ce@oss.qualcomm.com> <2ca3a260-d05f-4f2d-bf3f-08b4a3908792@arm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <2ca3a260-d05f-4f2d-bf3f-08b4a3908792@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTI5MDA4MCBTYWx0ZWRfX2/8WecFymK7c AccNeuWDgMxM9i7C8LOlYG9pkqVOgyEQUnJpJM0Zbfo0dNgMiOrG8Qp32X6tLuLLdAazWo36PUl mFhXZxiAi809IqNzVpzdZrOWsZODneWIh5SOYGBXvANHsH1p7XQaC3gUKdk/X/q3q4Z054mEk3j G19xWia1zgXEM4s0MuLDMFZ7rY4eaROldygJBke3tgJ0RZL1u3TzAqPLx6UmToIprHVjuWmY7m+ UazOZXtEGlq+hm88Dk+hoihY57l2rp8j2J5MYvUpo2fQtP1L2qKGgH2iqyJxtpLvGNK1L2corcU JlNdq3KEyf+j9W4EPNdJJTskFa4LpWO6fpME8or5TK/tCnsKcN9pFFdE6Rw00UByFlcz1Oy8Ol0 zUk9FuYXVNn1zNVmUaP9loodePmTTrPmRBnDkTH0AzohANJbY0ZCKsRzYWsHU4N+aPliJ67qB0e ixVkPLYdehaJYcxrrEw== X-Authority-Analysis: v=2.4 cv=QpRTHFyd c=1 sm=1 tr=0 ts=697b4ade cx=c_pps a=hnmNkyzTK/kJ09Xio7VxxA==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=vUbySO9Y5rIA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=VwQbUJbxAAAA:8 a=pGLkceISAAAA:8 a=PiMsTdOUj7AAGbzPdagA:9 a=QEXdDO2ut3YA:10 a=PEH46H7Ffwr30OY-TuGO:22 X-Proofpoint-GUID: Nk81DUJevyZuUi3rWQbWnOzvFbaYEj5v X-Proofpoint-ORIG-GUID: Nk81DUJevyZuUi3rWQbWnOzvFbaYEj5v X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-01-29_02,2026-01-28_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 lowpriorityscore=0 clxscore=1015 priorityscore=1501 phishscore=0 impostorscore=0 bulkscore=0 malwarescore=0 spamscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2601290080 On 1/29/26 12:38 PM, Lukasz Luba wrote: > > > On 1/29/26 11:23, Konrad Dybcio wrote: >> On 1/29/26 12:05 PM, Viresh Kumar wrote: >>> On 29-01-26, 12:00, Konrad Dybcio wrote: >>>> On 1/28/26 8:11 PM, Aaron Kling via B4 Relay wrote: >>>>> It should be noted that the A715 cores seem less efficient than the >>>>> A710 cores. Therefore, an average value has been assigned to them, >>>>> considering that the A715 and A710 cores share a single cpufreq >>>>> domain. >>>> >>>> Regarding the CPUFreq domain shared across cores with different power >>>> characteristics, I think we shouldn't be lying to the OS, rather Linux >>>> should be able to deal with it, somehow. >>> >>> cpufreq-domain == cpufreq-policy here I guess. All CPUs that change >>> their DVFS state together should be part of one policy. Not sure if >>> there is something else you were pointing at. >> >> Yes, they change their state together. >> >> The question is whether it's okay for these CPUs to have different >> dynamic-power-coefficient values, and whether the EM code won't be >> thrown off by that. > > The Energy Model won't support that, since it's a single > instance per-cpufreq-policy and we have to pick 'some' values (in this > case). Do you think taking an average, like suggested by the original author, makes sense here? >> Again, they differ because within that shared policy, there's 2 >> separate kinds of cores (2x Cortex-A715 + 2x Cortex-A710). >> > > For this SoC I assume the physical HW (power rail and frequency domain) > is linked to those 4 CPUs. That's quite novel configuration... > > Maybe I could give you some hint at least for the EAS part (the EM > for EAS), because for something in other areas (e.g. thermal) might > be really tough. In this case, these cores have **fairly** similar power/perf characteristics, as evidenced by the measurements in the root of this thread, see: https://lore.kernel.org/linux-arm-msm/20260128-sm8550-eas-v1-1-fb80615bed5c@gmail.com/ > What are the other CPUs in that SoC and their DVFS configs? Domain 0: 3x A510 Domain 1: 2x A715 + 2x A710 Domain 2: 1x X3 Konrad