Re: [PATCH v5 1/5] thermal: qcom-spmi-temp-alarm: enable stage 2 shutdown when required

[Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>]

On 6/20/25 2:19 AM, Anjelique Melendez wrote:
> From: David Collins <david.collins@oss.qualcomm.com>
> 
> Certain TEMP_ALARM GEN2 PMIC peripherals need over-temperature
> stage 2 automatic PMIC partial shutdown to be enabled in order to
> avoid repeated faults in the event of reaching over-temperature
> stage 3. Modify the stage 2 shutdown control logic to ensure that
> stage 2 shutdown is enabled on all affected PMICs. Read the
> digital major and minor revision registers to identify these
> PMICs.

Can stage 3 can be thought of as "hotter than s2, need to take
even more concrete action"?

> Signed-off-by: David Collins <david.collins@oss.qualcomm.com>
> Signed-off-by: Anjelique Melendez <anjelique.melendez@oss.qualcomm.com>
> ---

[...]

> +#define QPNP_TM_REG_DIG_MINOR		0x00
>  #define QPNP_TM_REG_DIG_MAJOR		0x01
>  #define QPNP_TM_REG_TYPE		0x04
>  #define QPNP_TM_REG_SUBTYPE		0x05
> @@ -78,6 +80,7 @@ struct qpnp_tm_chip {
>  	/* protects .thresh, .stage and chip registers */
>  	struct mutex			lock;
>  	bool				initialized;
> +	bool				require_s2_shutdown;

Let's turn 's2' into 'stage2', it's not obvious

[...]

> @@ -402,6 +405,12 @@ static int qpnp_tm_probe(struct platform_device *pdev)
>  		return dev_err_probe(&pdev->dev, ret,
>  				     "could not read dig_major\n");
>  
> +	ret = qpnp_tm_read(chip, QPNP_TM_REG_DIG_MINOR, &dig_minor);
> +	if (ret < 0) {
> +		dev_err(&pdev->dev, "could not read dig_minor\n");
> +		return ret;
"return dev_err_probe()" is preferred

Konrad