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[83.9.3.23]) by smtp.gmail.com with ESMTPSA id l6-20020ac25546000000b004dd6c325311sm2993786lfk.248.2023.04.12.05.09.33 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 12 Apr 2023 05:09:34 -0700 (PDT) Message-ID: <2e648a97-083e-8ee2-1695-4af299bb222a@linaro.org> Date: Wed, 12 Apr 2023 14:09:33 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.9.1 Subject: Re: [PATCH v2 1/2] dt-bindings: interrupt-controller: mpm: Pass MSG RAM slice through phandle Content-Language: en-US To: Krzysztof Kozlowski , Stephan Gerhold Cc: Rob Herring , Thomas Gleixner , Andy Gross , linux-kernel@vger.kernel.org, Shawn Guo , Marijn Suijten , Krzysztof Kozlowski , Bjorn Andersson , Marc Zyngier , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org References: <20230328-topic-msgram_mpm-v2-0-e24a48e57f0d@linaro.org> <20230328-topic-msgram_mpm-v2-1-e24a48e57f0d@linaro.org> <168069726278.2356075.14351594478003012447.robh@kernel.org> <20230405134727.GA2461305-robh@kernel.org> <1e6e2590-ac78-400b-35ce-321d5e52f385@linaro.org> <9df12111-ec84-c4f7-fbcb-bccaef91b048@linaro.org> <3ce9b5ec-8b02-537a-c663-c849e80cab66@linaro.org> <198523f5-d06f-15cd-af6c-f391c02bcaa9@linaro.org> <1f8fc036-380b-0a42-bb29-a3e275ed6a33@linaro.org> From: Konrad Dybcio In-Reply-To: <1f8fc036-380b-0a42-bb29-a3e275ed6a33@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 12.04.2023 13:55, Krzysztof Kozlowski wrote: > On 12/04/2023 13:47, Konrad Dybcio wrote: >>> For unrelated reasons I actually have some patches for this, that switch >>> the /smd top-level node to a "remoteproc-like" node dedicated to the >>> RPM, similar to how WCNSS/ADSP/Modem/etc are represented. I need this to >>> add additional (optional) properties like "resets" and "iommus" for the >>> RPM, but it would allow adding arbitrary subnodes as well: >>> >>> https://github.com/msm8916-mainline/linux/commit/35231ac28703805daa8220f1233847c7df34589e >>> >>> I could finish those up and post them if that would help... >> Krzysztof, what do you think? > > I don't know what is there in MSM8916 and how it should be represented. Similarly to other Qualcomm SoCs, MSM8916 has a RPM (Cortex-M3) core, which communicates over the SMD protocol (or G-LINK on >=8996). The Qualcomm firmware loads the RPM fw blob and sets it up early in the boot process, but msm8916-mainline folks managed to get TF-A going and due to it being less.. invasive.. than the Qualcomm TZ, RPM needs a bit more handling to be accessible. The M3 core is wired up through the CNoC bus and we communicate with it through the MSG RAM and the "APCS mailbox". Konrad > > Best regards, > Krzysztof >