From: Sricharan Ramabadhran <quic_srichara@quicinc.com>
To: Greg KH <gregkh@linuxfoundation.org>
Cc: <agross@kernel.org>, <andersson@kernel.org>,
<konrad.dybcio@linaro.org>, <robh@kernel.org>, <mani@kernel.org>,
<lpieralisi@kernel.org>, <bhelgaas@google.com>, <kw@linux.com>,
<linux-arm-msm@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-pci@vger.kernel.org>, <stable@vger.kernel.org>
Subject: Re: [PATCH V4] PCI: qcom: Fixing broken pcie bring up for 2_3_3 configs ops
Date: Mon, 17 Jul 2023 22:45:42 +0530 [thread overview]
Message-ID: <2fc238aa-82c1-383a-9dca-72f979ee3c07@quicinc.com> (raw)
In-Reply-To: <2023071729-shamrock-evidence-b698@gregkh>
On 7/17/2023 7:09 PM, Greg KH wrote:
> On Mon, Jul 17, 2023 at 12:25:35PM +0530, Sricharan Ramabadhran wrote:
>> PARF_SLV_ADDR_SPACE_SIZE_2_3_3 macro is used for IPQ8074
>> 2_3_3 post_init ops. PCIe slave addr size was initially set
>> to 0x358, but was wrongly changed to 0x168 as a part of
>> commit 39171b33f652 ("PCI: qcom: Remove PCIE20_ prefix from
>> register definitions"). Fixing it, by using the right macro
>> PARF_SLV_ADDR_SPACE_SIZE and remove the unused
>> PARF_SLV_ADDR_SPACE_SIZE_2_3_3.
>
> Note, you do have a full 72 columns to use, no need to make it smaller.
ok sure
>
>> Without this pcie bring up on IPQ8074 is broken now.
>
> I do not understand, something that used to work now breaks, or this is
> preventing a new chip from being "brought up"?
>
yes, ipq8074 pcie which was previously working is broken now.
This patch fixes it.
Regards,
Sricharan
next prev parent reply other threads:[~2023-07-17 17:16 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-17 6:55 [PATCH V4] PCI: qcom: Fixing broken pcie bring up for 2_3_3 configs ops Sricharan Ramabadhran
2023-07-17 13:39 ` Greg KH
2023-07-17 17:15 ` Sricharan Ramabadhran [this message]
2023-07-17 17:53 ` Dmitry Baryshkov
2023-07-20 9:55 ` Sricharan Ramabadhran
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