From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 36249C433EF for ; Mon, 28 Feb 2022 19:49:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229583AbiB1Ttm (ORCPT ); Mon, 28 Feb 2022 14:49:42 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41550 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229759AbiB1Ttc (ORCPT ); Mon, 28 Feb 2022 14:49:32 -0500 Received: from alexa-out-sd-02.qualcomm.com (alexa-out-sd-02.qualcomm.com [199.106.114.39]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 244BBF1E9F; Mon, 28 Feb 2022 11:48:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1646077690; x=1677613690; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=MInk9txStQDqT+0IPo/C/sjXdjYc5+CFroTNrH0V6BI=; b=ydzR1TwaaQIqaXTEGN6WpLmf5rX9s1q5hmlw0p1An+DzJ+7l3Y4dlRdM Mta1h7lB0Kutkk/0WbiZvHINgzser+AbcoadE6rAovWG2L9C9oNhzbL/p V0iEZxATR0RWDSXa2e8ITW8dJMElHbcN2YfBX2Z9+sNmI6Dz/ZOdnhM/p c=; Received: from unknown (HELO ironmsg03-sd.qualcomm.com) ([10.53.140.143]) by alexa-out-sd-02.qualcomm.com with ESMTP; 28 Feb 2022 11:31:03 -0800 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg03-sd.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Feb 2022 11:31:03 -0800 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.15; Mon, 28 Feb 2022 11:31:02 -0800 Received: from [10.216.31.79] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.15; Mon, 28 Feb 2022 11:30:59 -0800 Message-ID: <323c2a02-2552-ac49-8557-2a6da82b29ed@quicinc.com> Date: Tue, 1 Mar 2022 01:00:56 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.6.1 Subject: Re: [PATCH 4/5] irqchip/qcom-pdc: Fix broken locking To: Marc Zyngier , CC: Andy Gross , Bjorn Andersson , Thomas Gleixner , References: <20220224101226.88373-1-maz@kernel.org> <20220224101226.88373-5-maz@kernel.org> From: "Maulik Shah (mkshah)" In-Reply-To: <20220224101226.88373-5-maz@kernel.org> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Hi, On 2/24/2022 3:42 PM, Marc Zyngier wrote: > pdc_enable_intr() serves as a primitive to qcom_pdc_gic_{en,dis}able, > and has a raw spinlock for mutual exclusion, which is uses with > interruptible primitives. > > This means that this critical section can itself be interrupted. > Should the interrupt also be a PDC interrupt, and the endpoint driver > perform an irq_disable() on that interrupt, we end-up in a deadlock. > > Fix this by using the irqsave/irqrestore variants of the locking > primitives. > > Signed-off-by: Marc Zyngier Reviewed-by: Maulik Shah Thanks, Maulik > --- > drivers/irqchip/qcom-pdc.c | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > >