Re: [RFT PATCH 2/2] arm64: dts: qcom: ipq9574: Complete USB DWC3 wrapper interrupts

[Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>]

On 1/7/2026 12:21 AM, Krzysztof Kozlowski wrote:
> Complete interrupts for DWC3 node to match what is required by
> Devicetree bindings, as reported by dtbs_check:
>
>    ipq9574-rdp433.dtb: usb@8af8800 (qcom,ipq9574-dwc3): interrupt-names: ['pwr_event'] is too short
>
> The actual interrupt numbers are taken from reference manual of similar
> chip, but not IPQ9574, due to lack of access to it.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
>
> ---
>
> Not tested on hardware.
>
> "lack of access" = no IPQ9574 at all.

Initially the SoC was named as IPQ9048 and after sometime it is renamed 
as IPQ9574. But unfortunately, the reference manual is not updated with 
the new naming.

I can confirm the below interrupts are correct. So,

Reviewed-by: Kathiravan Thirumoorthy 
<kathiravan.thirumoorthy@oss.qualcomm.com>

Thanks, Kathiravan T.

> ---
>   arch/arm64/boot/dts/qcom/ipq9574.dtsi | 10 ++++++++--
>   1 file changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
> index 86c9cb9fffc9..d7278f2137ac 100644
> --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
> +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
> @@ -765,8 +765,14 @@ usb3: usb@8af8800 {
>   			assigned-clock-rates = <200000000>,
>   					       <24000000>;
>   
> -			interrupts-extended = <&intc GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
> -			interrupt-names = "pwr_event";
> +			interrupts-extended = <&intc GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
> +					      <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
> +					      <&intc GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
> +					      <&intc GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "pwr_event",
> +					  "qusb2_phy",
> +					  "dm_hs_phy_irq",
> +					  "dp_hs_phy_irq";
>   
>   			resets = <&gcc GCC_USB_BCR>;
>   			status = "disabled";