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[188.141.3.146]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3a06d54c246sm1571967f8f.86.2025.04.24.03.17.13 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 24 Apr 2025 03:17:14 -0700 (PDT) Message-ID: <36feffed-4558-4e59-97db-2f0e916dbfc7@linaro.org> Date: Thu, 24 Apr 2025 11:17:13 +0100 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 2/5] dt-bindings: media: Add qcom,x1e80100-camss To: Krzysztof Kozlowski , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Robert Foss , Todor Tomov , Mauro Carvalho Chehab , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, Vladimir Zapolskiy References: <20250314-b4-linux-next-25-03-13-dtsi-x1e80100-camss-v6-0-edcb2cfc3122@linaro.org> <20250314-b4-linux-next-25-03-13-dtsi-x1e80100-camss-v6-2-edcb2cfc3122@linaro.org> <3ec3fd62-bf21-47e7-873c-ce151589d743@linaro.org> <54eeb470-cd90-4bc2-b415-6dea1ce2321d@linaro.org> <0ab31397-580f-4e5a-b9ad-d9bf79d29106@linaro.org> Content-Language: en-US From: Bryan O'Donoghue In-Reply-To: <0ab31397-580f-4e5a-b9ad-d9bf79d29106@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 24/04/2025 11:07, Krzysztof Kozlowski wrote: > On 24/04/2025 11:34, Bryan O'Donoghue wrote: >> On 24/04/2025 07:40, Krzysztof Kozlowski wrote: >>>> + vdd-csiphy-0p8-supply: >>> Same comment as other series on the lists - this is wrong name. There >>> are no pins named like this and all existing bindings use different name. >> >> The existing bindings are unfortunately not granular enough. >> >> I'll post s series to capture pin-names per the SoC pinout shortly. > How are the pins/supplies actually called? > > Best regards, > Krzysztof I don't think strictly algning to pin-names is what we want. Here are the input pins VDD_A_CSI_0_1_1P2 VDD_A_CSI_2_4_1P2 VDD_A_CSI_0_1_0P9 VDD_A_CSI_2_4_0P9 I think the right way to represent this yaml: csiphy0-1p2-supply csiphy1-1p2-supply csiphy2-1p2-supply csiphy3-1p2-supply dts: vdd-csiphy0-0p9-supply = <&vreg_l2c_0p8>; vdd-csiphy1-0p9-supply = <&vreg_l2c_0p8>; etc vdda-csiphy0-1p2-supply = <&vreg_l1c_1p2>; because that captures the fact we could have separate lines for each phy, names it generically and then leaves it up to the dts implementation to represent what actually happened on the PCB. That would also work for qcm2290 and sm8650. https://lore.kernel.org/linux-arm-msm/20250423221954.1926453-2-vladimir.zapolskiy@linaro.org/ So for sm8650 instead of + vdda-csi01-0p9-supply: + + vdda-csi24-0p9-supply: + + vdda-csi35-0p9-supply: + + vdda-csi01-1p2-supply: + + vdda-csi24-1p2-supply: + + vdda-csi35-1p2-supply: you would have + vdda-csiphy0-0p9-supply: + + vdda-csiphy1-0p9-supply: + vdda-csiphy0-1p2-supply: + + vdda-csiphy1-1p2-supply: Which would then be consistent across SoCs for as long as 0p9 and 1p2 are the power-domains used by these PHYs. --- bod