From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 34F26C433EF for ; Thu, 9 Jun 2022 05:14:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238102AbiFIFOr (ORCPT ); Thu, 9 Jun 2022 01:14:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34340 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237414AbiFIFOq (ORCPT ); Thu, 9 Jun 2022 01:14:46 -0400 Received: from alexa-out-sd-01.qualcomm.com (alexa-out-sd-01.qualcomm.com [199.106.114.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7E1571A812; Wed, 8 Jun 2022 22:14:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1654751684; x=1686287684; h=message-id:date:mime-version:subject:to:references:from: in-reply-to:content-transfer-encoding; bh=dEbrU2rxRky4QmiaqBPlHBqLGI59vmI89+wQyxw/sEc=; b=jkkmYi8H27mLxvfWJdFJ6dAJI1ytmUWvdhBtjzCmCefqLUmLyaNy65+O liTEIrkpRRSlqDWk7pCwtuqleJWwgZVo9jUkXXC5oUO7pnAufKnbAGi9S KtTwcHv+qk038IEHhqHjB/jgYyMT3SpJxNz+q48BUnWpio2NYwzQEGrVV c=; Received: from unknown (HELO ironmsg03-sd.qualcomm.com) ([10.53.140.143]) by alexa-out-sd-01.qualcomm.com with ESMTP; 08 Jun 2022 22:14:44 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg03-sd.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jun 2022 22:14:43 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Wed, 8 Jun 2022 22:14:43 -0700 Received: from [10.216.22.79] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Wed, 8 Jun 2022 22:14:37 -0700 Message-ID: <39a607ee-180e-b261-46f9-349c70294f4e@quicinc.com> Date: Thu, 9 Jun 2022 10:44:33 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.6.1 Subject: Re: [PATCH v3 2/2] ASoC: qcom: soundwire: Add software clock gating requirement check Content-Language: en-US To: Stephen Boyd , , , , , , , , , , , , , , , , , References: <1654696929-20205-1-git-send-email-quic_srivasam@quicinc.com> <1654696929-20205-3-git-send-email-quic_srivasam@quicinc.com> From: Srinivasa Rao Mandadapu Organization: Qualcomm In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 6/9/2022 12:59 AM, Stephen Boyd wrote: Thanks for Your time Stephen!!! > Quoting Srinivasa Rao Mandadapu (2022-06-08 07:02:09) >> Validate software clock gating required or not and do software >> clock gating on hclk if soundwire is operational and keep it >> running by adding flag in private dat structure. >> This is to avoid conflict between older architectures, >> where software clock gating is not required and on latest >> architectues, where software clock gating is mandatory. > This talks about software clock gating but the code is getting a reset > and asserting it. Is that because the power on reset value of the clock > gating is to have hardware clock gating disabled, but some earlier code > is enabling hardware clock gating? Yes Stephen. By Default this resets to HW controlled. As such there is no specific code for enabling hardware clock gating, as these CGCR registers default setting is HW control. > >> Signed-off-by: Srinivasa Rao Mandadapu >> Reviewed-by: Srinivas Kandagatla >> --- >> drivers/soundwire/qcom.c | 27 ++++++++++++++++++++------- >> 1 file changed, 20 insertions(+), 7 deletions(-) >> >> diff --git a/drivers/soundwire/qcom.c b/drivers/soundwire/qcom.c >> index 38c3bf5..ebd7479 100644 >> --- a/drivers/soundwire/qcom.c >> +++ b/drivers/soundwire/qcom.c >> @@ -659,7 +665,8 @@ static int qcom_swrm_init(struct qcom_swrm_ctrl *ctrl) >> val = FIELD_PREP(SWRM_MCP_FRAME_CTRL_BANK_ROW_CTRL_BMSK, ctrl->rows_index); >> val |= FIELD_PREP(SWRM_MCP_FRAME_CTRL_BANK_COL_CTRL_BMSK, ctrl->cols_index); >> >> - reset_control_reset(ctrl->audio_cgcr); >> + if (ctrl->audio_cgcr) >> + reset_control_reset(ctrl->audio_cgcr); >> >> ctrl->reg_write(ctrl, SWRM_MCP_FRAME_CTRL_BANK_ADDR(0), val); >> >> @@ -1494,7 +1506,8 @@ static int __maybe_unused swrm_runtime_resume(struct device *dev) >> qcom_swrm_get_device_status(ctrl); >> sdw_handle_slave_status(&ctrl->bus, ctrl->status); >> } else { >> - reset_control_reset(ctrl->audio_cgcr); >> + if (ctrl->audio_cgcr) >> + reset_control_reset(ctrl->audio_cgcr); > reset_control_reset() is a no-op if the pointer is NULL so the if > condition is not necessary in the above two statements. Okay. revert this NULL check here.