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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-63788110de2sm14260231a12.35.2025.10.08.01.48.54 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 08 Oct 2025 01:48:55 -0700 (PDT) Message-ID: <39d07bf1-cead-449f-85c8-4651e5296cd8@oss.qualcomm.com> Date: Wed, 8 Oct 2025 10:48:53 +0200 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 4/5] arm64: dts: qcom: r0q: enable hardware clocks To: =?UTF-8?Q?Eric_Gon=C3=A7alves?= , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org References: <20250920014637.38175-1-ghatto404@gmail.com> <20250920014637.38175-5-ghatto404@gmail.com> <99D0B281-03A5-447E-A6BF-892C99829D0B@gmail.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Authority-Analysis: v=2.4 cv=IrITsb/g c=1 sm=1 tr=0 ts=68e62579 cx=c_pps a=mPf7EqFMSY9/WdsSgAYMbA==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=x6icFKpwvdMA:10 a=EUspDBNiAAAA:8 a=pGLkceISAAAA:8 a=wKFhJIuLoAScDjwq2nEA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=dawVfQjAaf238kedN5IG:22 X-Proofpoint-GUID: tWWKbRSk-hOZ10NW8M6Mz6EFIp3vQk7z X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMDA0MDAyOSBTYWx0ZWRfX7yFKVsxhwfgB 0q+1D1ENJyqdKk8EzIIMhQwJDfaCdTVT7dKhykMEUSYoj5cCayDFEQWOtNw1v2MchnmVqeC5JvT 17qh1bCmGHTk8BFh+IibdmVmM610OwJcPkCW+r6+QuWJJeh1uVKSC0HaWAszP5JHu7LQhKExHgr AFI5Gxd7t3ZJdLJmqJAbw19H4+Ktkvu+04pSEoh1zxzNrxGPKxPYwx6vIiYJbEt8EybCVp+unOW WCQM4QdR2nnu/bhvumxo1Z0ReH/c/f1sAfcy0s7lnPBzoL1QybO4ZSFgpMt4a5YWd58ERapnZ2T u09YNPzI1cf6CBG0M5/4kwjtNztsy/0PygeGN6DHe3t0K6XG++g0diW3N59WaT0CY3b4Rg4jRes 8uY3WqHKS8NqBTNJemlOgBmDqu2MnA== X-Proofpoint-ORIG-GUID: tWWKbRSk-hOZ10NW8M6Mz6EFIp3vQk7z X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-10-08_02,2025-10-06_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 priorityscore=1501 bulkscore=0 clxscore=1015 malwarescore=0 spamscore=0 phishscore=0 impostorscore=0 lowpriorityscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2509150000 definitions=main-2510040029 On 10/6/25 5:49 PM, Eric Gonçalves wrote: > > > On October 6, 2025 9:31:42 AM GMT-03:00, Konrad Dybcio wrote: >> On 10/5/25 5:50 AM, Eric Gonçalves wrote: >>> >>> >>> On September 25, 2025 10:09:48 AM GMT-03:00, Konrad Dybcio wrote: >>>> On 9/20/25 3:46 AM, Eric Gonçalves wrote: >>>>> Enable the real-time clocks found in R0Q board. >>>>> >>>>> Signed-off-by: Eric Gonçalves >>>>> --- >>>>> arch/arm64/boot/dts/qcom/sm8450-samsung-r0q.dts | 15 +++++++++++++++ >>>>> 1 file changed, 15 insertions(+) >>>>> >>>>> diff --git a/arch/arm64/boot/dts/qcom/sm8450-samsung-r0q.dts b/arch/arm64/boot/dts/qcom/sm8450-samsung-r0q.dts >>>>> index c1b0b21c0ec5..c088f1acf6ea 100644 >>>>> --- a/arch/arm64/boot/dts/qcom/sm8450-samsung-r0q.dts >>>>> +++ b/arch/arm64/boot/dts/qcom/sm8450-samsung-r0q.dts >>>>> @@ -225,6 +225,21 @@ vol_up_n: vol-up-n-state { >>>>> }; >>>>> }; >>>>> >>>>> +&pmk8350_rtc { >>>>> + nvmem-cells = <&rtc_offset>; >>>>> + nvmem-cell-names = "offset"; >>>>> + >>>>> + status = "okay"; >>>>> +}; >>>>> + >>>>> +&pmk8350_sdam_2 { >>>>> + status = "okay"; >>>>> + >>>>> + rtc_offset: rtc-offset@bc { >>>> >>>> Is this an offset you took from somewhere downstream? >>>> >>>> Generally you *really don't want to* poke at random SDAM cells, >>>> as they contain a lot of important settings (incl. battery/charging) >>> From another sm8450 device, I'm sure it's okay. >> >> That as an argument alone doesn't sound convincing to me, since vendors >> also sometimes repurpose unused-by-Qualcomm SDAM cells >> >> I actually found a data source internally and this cell you're trying >> to use is reserved for PBS (see drivers/soc/qcom/qcom-pbs.c), meaning >> you already fell into this trap.. > Interesting, in this case then why does rtc still work? And > how can I find the real cell? It's not in downstream DT. Well if nothing accesses that cell between your last write and your first read, it will of course work, because SDAM is just a means of storage As for downstream/Android, it does not use SDAM at all Konrad