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Mon, 5 Sep 2022 07:21:26 GMT Received: from [10.50.47.247] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Mon, 5 Sep 2022 00:21:17 -0700 Message-ID: <3af38280-c94b-e5ef-7a66-4869b1f36a30@quicinc.com> Date: Mon, 5 Sep 2022 12:51:12 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.6.1 Subject: Re: [PATCH v5 2/3] PCI: qcom: Restrict pci transactions after pci suspend Content-Language: en-US To: Manivannan Sadhasivam , "Krishna Chaitanya Chundru" CC: Stephen Boyd , , , , , , , , , , , , Jingoo Han , Gustavo Pimentel , Lorenzo Pieralisi , Rob Herring , =?UTF-8?Q?Krzysztof_Wilczy=c5=84ski?= , Bjorn Helgaas , Andy Gross , Bjorn Andersson , Stanimir Varbanov , Thomas Gleixner , Marc Zyngier References: <1659526134-22978-1-git-send-email-quic_krichai@quicinc.com> <1659526134-22978-3-git-send-email-quic_krichai@quicinc.com> <3d052733-3600-b6eb-baf3-d8806a150af3@quicinc.com> <81dcbf72-92bb-093a-da48-89a73ead820e@quicinc.com> <20220827172655.GA14465@thinkpad> <20220830115514.GD135982@thinkpad> From: Sai Prakash Ranjan In-Reply-To: <20220830115514.GD135982@thinkpad> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: rUhb-i1K1UpPaAIekJeyIwhdi64bYleT X-Proofpoint-GUID: rUhb-i1K1UpPaAIekJeyIwhdi64bYleT X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.517,FMLib:17.11.122.1 definitions=2022-09-05_05,2022-09-05_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 clxscore=1011 phishscore=0 spamscore=0 mlxscore=0 bulkscore=0 adultscore=0 suspectscore=0 lowpriorityscore=0 malwarescore=0 mlxlogscore=910 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2207270000 definitions=main-2209050035 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 8/30/2022 5:25 PM, Manivannan Sadhasivam wrote: ... >> diff --git a/kernel/irq/irqdesc.c b/kernel/irq/irqdesc.c >> index 21b3ac2a29d2..042afec1cf9d 100644 >> --- a/kernel/irq/irqdesc.c >> +++ b/kernel/irq/irqdesc.c >> @@ -487,8 +487,9 @@ static int alloc_descs(unsigned int start, unsigned int >> cnt, int node, >> >> >> >>                if (affinity) { >>                         if (affinity->is_managed) { >> -                               flags = IRQD_AFFINITY_MANAGED | >> -                                       IRQD_MANAGED_SHUTDOWN; >> +//                             flags = IRQD_AFFINITY_MANAGED | >> +//                                     IRQD_MANAGED_SHUTDOWN; >> +                               flags = 0;//IRQD_AFFINITY_MANAGED | >>                         } >>                         mask = &affinity->mask; >>                         node = cpu_to_node(cpumask_first(mask)); >> > The only solution I can think of is keeping the clocks related to DBI access > active or switch to another clock source that consumes less power if available > during suspend. > > But limiting the DBI access using hacks doesn't look good. Why not just define "irq_startup and irq_shutdown" callbacks for dw_pcie_msi_irq_chip? So when the cpu is offlined and irq_shutdown is called for that irqchip in migrate_one_irq(), you would mask the irq and then disable the clocks. Similarly, on CPU onlining, you would enable the clocks and unmask the irq. This way XO is still achieved as you are turning off the clocks before suspend and back on after resume. Thanks, Sai