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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b76f51a9819sm178881466b.25.2025.11.27.05.47.36 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 27 Nov 2025 05:47:38 -0800 (PST) Message-ID: <3b609409-e19f-4685-848d-807a4e840ad8@oss.qualcomm.com> Date: Thu, 27 Nov 2025 14:47:36 +0100 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 0/3] arm64: dts: qcom: sm8x50: Enable UHS-I SDR50 and SDR104 SD card modes To: Val Packett , Vladimir Zapolskiy , Bjorn Andersson , Konrad Dybcio , Krzysztof Kozlowski Cc: Neil Armstrong , Rob Herring , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org References: <20251126012043.3764567-1-vladimir.zapolskiy@linaro.org> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMTI3MDEwMiBTYWx0ZWRfXyTNOzLDiz4Fb cTcUBpIdkX7keLIaXdjgadNv9rhl2CNr39tBTNj/pSx5XlOvbSIHoumZmw6vr871TqzJRFfsjk7 6tiAVC3NYYjYzgggroNiwGuVlhOGET3W1yIzdKOKFzuYAyTyoV4+6RTIK+r51S9dvZ1+yEDpV8Y wvORELBHrNE006QN9S0tLZ0OpRmy19EO+C5WeRuTv4yG6DDszrywVBBqqvWmlDrS0VEBXdnMcK8 jAWaFKMMYLVIVpoKSULzgzdDufTERn/Ct2mLZ8BFsTea/u+KRn3UcG1clFgqUWpo5iA9zueoMDf 2u25A1eHqbEnWWRL0YeY3qJ5fjcgqRxgyzXhy9QWrZNFOijI++o8xuGFCS8JMYd9kVOxH022Nol QnoFTRxeo0ur+YIttf/0kyH/Q3JgLw== X-Proofpoint-GUID: F9OMyJW36dPiqtTz4YVqdLjlkbVAPj2P X-Proofpoint-ORIG-GUID: F9OMyJW36dPiqtTz4YVqdLjlkbVAPj2P X-Authority-Analysis: v=2.4 cv=PJoCOPqC c=1 sm=1 tr=0 ts=6928567b cx=c_pps a=WeENfcodrlLV9YRTxbY/uA==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=6UeiqGixMTsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=NZNovLmTKhFXNInCTM4A:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=kacYvNCVWA4VmyqE58fU:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-11-25_02,2025-11-27_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 lowpriorityscore=0 suspectscore=0 phishscore=0 priorityscore=1501 clxscore=1015 adultscore=0 impostorscore=0 malwarescore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2511270102 On 11/26/25 5:14 PM, Val Packett wrote: > Hi, > > On 11/25/25 10:20 PM, Vladimir Zapolskiy wrote: >> The reported problem of some non-working UHS-I speed modes on SM8450 >> originates in commit 0a631a36f724 ("arm64: dts: qcom: Add device tree >> for Sony Xperia 1 IV"), and then it was spread to all SM8450 powered >> platforms by commit 9d561dc4e5cc ("arm64: dts: qcom: sm8450: disable >> SDHCI SDR104/SDR50 on all boards"). >> >> The tests show that the rootcause of the problem was related to an >> overclocking of SD cards, and it's fixed later on by commit a27ac3806b0a >> ("clk: qcom: gcc-sm8450: Use floor ops for SDCC RCGs"). >> >> Due to a missed setting of an appropriate SDCC clock operations in >> platform GCC driver the workaround of dropping SD card speeds from UHS-I >> to high speed was spread to SM8550 and SM8650 platforms, and since >> the fixes in the clock controller drivers are ready [1], it should be >> safe to remove the speed mode restrictions from SM8450, SM8550 and >> SM8650 platforms. >> [..] > > I see you have tested with dd on the raw block device, but have you tested hotplugging SD cards that have partition tables and filesystems on them? > > We have this kind of issue on Hamoa where we get I/O errors early, right after the card is inserted and the partition table / filesystem headers are being read: > > [  714.057106] mmc0: new UHS-I speed SDR104 SDXC card at address 0001 > [  714.060567] mmcblk0: mmc0:0001 EC2QT 59.6 GiB > [  714.503873] I/O error, dev mmcblk0, sector 0 op 0x0:(READ) flags 0x0 phys_seg 1 prio class 2 > [  714.505660] Buffer I/O error on dev mmcblk0, logical block 0, async page read > [  714.513632] I/O error, dev mmcblk0, sector 0 op 0x0:(READ) flags 0x0 phys_seg 1 prio class 2 > [  714.516469] Buffer I/O error on dev mmcblk0, logical block 0, async page read > [  714.516512]  mmcblk0: unable to read partition table Before we start debugging, could you please confirm it's using the internal (&sdhc_2) MMC controller, and not one connected over PCIe, like it's the case on the Surface Laptop? Are the regulators supplying vmmc and vqmmc in high power mode? Konrad