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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-59e0a2ddabasm3158660e87.25.2026.02.02.04.35.02 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 02 Feb 2026 04:35:05 -0800 (PST) Message-ID: <3d88b354-66a2-4125-a06d-752b052bf0ee@oss.qualcomm.com> Date: Mon, 2 Feb 2026 13:35:01 +0100 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH RFT 2/3] arm64: dts: qcom: glymur: Add USB related nodes To: Wesley Cheng , Abel Vesa Cc: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Greg Kroah-Hartman , Wesley Cheng , Pankaj Patil , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org References: <20260113-dts-qcom-glymur-add-usb-support-v1-0-98d6d387df01@oss.qualcomm.com> <20260113-dts-qcom-glymur-add-usb-support-v1-2-98d6d387df01@oss.qualcomm.com> <01de4054-eebf-4ef3-ad74-c806b208a848@oss.qualcomm.com> <6lieos5uudkgynizozrmzrj5ov57frzzl65b2fpanwbhbmehot@z5uhyv4ipyet> <4632ad3a-c893-449a-b0d1-48d9c93da7e9@oss.qualcomm.com> <86dade1c-3ac4-4352-8dc8-e7acaaf21321@oss.qualcomm.com> <5a773b89-f3f8-486b-af01-3387c99e53e5@oss.qualcomm.com> <3b5685da-5178-46ec-b720-97e1ecd5310c@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <3b5685da-5178-46ec-b720-97e1ecd5310c@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-ORIG-GUID: ZGmNhHOy4Rzh30jLr5CPFqjoQCe3vztG X-Authority-Analysis: v=2.4 cv=VJ/QXtPX c=1 sm=1 tr=0 ts=698099fb cx=c_pps a=JbAStetqSzwMeJznSMzCyw==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=HzLeVaNsDn8A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=QsawANE1_QW70S-DVw0A:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=uxP6HrT_eTzRwkO_Te1X:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMjAyMDA5OCBTYWx0ZWRfX7AQz3+A7Vtzw 0FwWlm8PgP8Isk6G+QEQJapMOSylzkBR/sIUrAESm19hL3va+BDa8Y6cbGXEQyzxfMVL7VNnKx2 Q5UH+WFCxTnUXzqLY+FUqAUWNceK5eR+cG/7IIMLpuNZnM/XqRHW3eYsQmXCHBavFmRgA4SavSk ornM7S5mzt/krQGa8mU4iIKZHXXoJAlGz/NKLUKori1+WCgCw/mItLctSRaG0X4V9lkW48pjFSy Q1X5X6/3sNx16LE295IH0F3fUey2KBj+cjc8i2wTRtWnhAWR92aJMESXOsBdnCrqMGDohpsXA2A Bo84DP1QYckazItf07NX18Z9BEocK57RWE+iNd2kpGz5l5FXwWfX/HtYtKFd+J2K++EtpebfvlM QQlRJfaCvlEhyMEPts8J0/Q1MW4xxMfvRIPQlE/wM6qwtKlrrBC2x/36vms7juRuE1JeLvHLkKK g6p2WgFrImy1LIOiR8A== X-Proofpoint-GUID: ZGmNhHOy4Rzh30jLr5CPFqjoQCe3vztG X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-02-02_04,2026-01-30_04,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 adultscore=0 malwarescore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 phishscore=0 priorityscore=1501 impostorscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2602020098 On 1/31/26 1:11 AM, Wesley Cheng wrote: > > > On 1/28/2026 1:53 AM, Konrad Dybcio wrote: >> On 1/27/26 11:26 PM, Wesley Cheng wrote: >>> >>> >>> On 1/27/2026 3:46 AM, Konrad Dybcio wrote: >>>> On 1/27/26 12:41 PM, Abel Vesa wrote: >>>>> On 26-01-13 14:13:32, Konrad Dybcio wrote: >>>>>> On 1/13/26 1:33 PM, Abel Vesa wrote: >>>>>>> From: Wesley Cheng >>>>>>> >>>>>>> The Glymur USB system contains 3 USB type C ports, 1 USB multiport >>>>>>> controller and a USB 2.0 only controller. This encompasses 5 SS USB QMP >>>>>>> PHYs (3 combo and 2 uni) and 6 M31 eUSB2 PHYs. All controllers are SNPS >>>>>>> DWC3 based, so describe them as flattened DWC3 QCOM nodes. >>>>>>> >>>>>>> Signed-off-by: Wesley Cheng >>>>>>> Co-developed-by: Abel Vesa >>>>>>> Signed-off-by: Abel Vesa >>>>>>> --- >>>>>> >>>>>> [...] >>>>>> >>>>>>> +            snps,dis_u2_susphy_quirk; >>>>>>> +            snps,dis_enblslpm_quirk; >>>>>>> +            snps,dis_u3_susphy_quirk; >>>>>>> +            snps,usb2-lpm-disable; >>>>>> >>>>>> Other SoCs have a list that's much longer, please consult Wesley if >>>>>> this list is enough >>>>> >>>>> Checked with Wesley. He confirmed that this trimmed list is fine. >>>>> He said he dropped the rest since they are related to the power saving >>>>> features like USB2/3 LPM (l1 or u1/u2) and we don't seem need those. >>>> >>>> Is that to say that those erratas were fixed in this hardware? >>>> >>>> Low-power states of the link are no less than desired is possible.. >>>> >>> >>> I think it was misunderstood.  We should keep the same quirks as our previous targets to enable USB LPM support in certain cases. >>> >>> snps,hird-threshold = /bits/ 8 <0x0>; >>> snps,usb2-gadget-lpm-disable; >>> snps,dis-u1-entry-quirk; >>> snps,dis-u2-entry-quirk; >>> snps,is-utmi-l1-suspend; >>> snps,usb3_lpm_capable; >>> snps,has-lpm-erratum; >>> tx-fifo-resize; >>> snps,dis_u2_susphy_quirk; >>> snps,dis_enblslpm_quirk; >>> snps,usb2-lpm-disable; >>> >>> There are some questionable ones that I'm on the fence though, which we should consider removing: >>> snps,usb2-lpm-disable >>> snps,usb2-gadget-lpm-disable >>> >>> USB L1 support is routinely being verified on our devices (in host and device modes), so if its power over performance, we should consider removing the properties to disable USB L1. >> >> Does the fact that we allow L1 entry impact performance itself, or is >> there some room for improvement in the drivers? >> > > Hi Konrad, > > Its not exactly something USB drivers have control of, as USB L1 LPM is a feature handled within the controller.  The only reason why we might see some performance hit is if we have to frequently enter/exit L1 states, but if the link never make transitions into L1, then we obviously won't take a hit. > >> >>   (esp since we're defining the HIRD threshold as well...) >> >> Wouldn't HIRD threshold be related to *U*1(/2) though? >> I see in the list above you decalred >> > > U1/U2 are USB3 LPM states, which utilize the BESL, not HIRD. > >> snps,dis-u1-entry-quirk >> snps,dis-u2-entry-quirk >> >> which forbid them >> > > These disable them for when we are in gadget/peripheral mode, but u1/u2 while in host mode is still enabled.  I'm not sure we are confident enough yet at this point to enable them (U1/U2) for device mode use cases. > >> and the threshold is set to 0, so IIUC that means entry is only allowed >> for devices that don't ""really"" suspend >> > > HIRD specifies the L1 exit latency that our device will require, and programming that to 0 will mean we'll require the minimum HIRD latency to exit L1. Seems I had a lot of misconceptions, thanks! Konrad