From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CFEC6C433FE for ; Wed, 9 Nov 2022 12:19:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229802AbiKIMTI (ORCPT ); Wed, 9 Nov 2022 07:19:08 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51272 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229629AbiKIMTI (ORCPT ); Wed, 9 Nov 2022 07:19:08 -0500 Received: from mail-lj1-x234.google.com (mail-lj1-x234.google.com [IPv6:2a00:1450:4864:20::234]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 07C1322528 for ; Wed, 9 Nov 2022 04:19:07 -0800 (PST) Received: by mail-lj1-x234.google.com with SMTP id u11so25484507ljk.6 for ; Wed, 09 Nov 2022 04:19:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=ye8sH1zl6sSv9DGDAjB1eEzXhmWboI2vsCHxYwdnJz0=; b=ZybYS6nV5FlcTXdHMLqh4gUjeCEABntLlbBDQEVcOAR1CZiPzbrwizoLaTkmEBRDoB nlxOmUVmwDcNHB9sx27cVU8h2xk0UuRyv8dTsTHL9ZhMRfRnb9jKGr0RuovM/JgfmAZl lxUPM4QzTpDcZJfxMpf8n0omxEYk42BKMKNGGmQufJ1+vfgNulurWPIvCC68Cx18q6FC T/9FEZngmNYLRa7CRlwPJF260cUIr5/s/iQbWzhjlPFaNHvracynMpdkxg60nTsk4pTw UOc2Ls4pdJy6SmAR/FlX0w9/udujOo3QWnowkPJB/m+iwAFzn6yvCl4FfqCRAi/j0vPp gpng== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=ye8sH1zl6sSv9DGDAjB1eEzXhmWboI2vsCHxYwdnJz0=; b=faN/4+rVVvbRg9RVTjEoHgFzX9F3ZZsTVd+MkOSNyxzQMTvcJb9kRcEtHI+/a+KBhF W1+moqIUFnJqzgB+3J4SnjQqujLUR2Sn6utoDTC2bETuqi4LJS39iFuW8GvY44E1ytQP txvCcq8SI2/kyKUur6eci6oXQka3JCognZkmS0y/s61BGbUqkLLvvpSoZBRfVxHm3r9T vHBuD3cOpex7Ir7OMmXP3W0RjT9bmQo0FVKLHmpwXH3MMmzcXomTMtXdczK7MEdpa8lB ep+4lFNtvs7tx+eTzZZYd1i4pORb4hxxSi0agP+blUdoVd2mjPBAKeJ5TtnO0z8Yi1o7 VulQ== X-Gm-Message-State: ANoB5pkPnTq17b9UNZ/bAQSZd3sFqp07g0XYWIQx9I6saWfA5hY+2NPS 3mXsk8qWUmEStXIy5wJDJX9q1w== X-Google-Smtp-Source: AA0mqf6Qt3W69twHjBbljDgjSSNO7IveTjCXXa66ab4tN+ev2MwpKhm0I2pTcRY2KRSEbjJplOS3zQ== X-Received: by 2002:a2e:544d:0:b0:278:ba60:d4f0 with SMTP id y13-20020a2e544d000000b00278ba60d4f0mr1986815ljd.351.1667996345347; Wed, 09 Nov 2022 04:19:05 -0800 (PST) Received: from [10.10.15.130] ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id c15-20020a056512238f00b004979da67114sm2192382lfv.255.2022.11.09.04.19.04 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 09 Nov 2022 04:19:04 -0800 (PST) Message-ID: <414280e3-6954-6832-10fa-66cdcdbfac18@linaro.org> Date: Wed, 9 Nov 2022 15:19:04 +0300 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.4.1 Subject: Re: [PATCH 1/4] drm/msm/disp/dpu1: pin 1 crtc to 1 encoder Content-Language: en-GB To: Kalyan Thota , dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org, robdclark@chromium.org, dianders@chromium.org, swboyd@chromium.org, quic_vpolimer@quicinc.com, quic_abhinavk@quicinc.com References: <1667996206-4153-1-git-send-email-quic_kalyant@quicinc.com> From: Dmitry Baryshkov In-Reply-To: <1667996206-4153-1-git-send-email-quic_kalyant@quicinc.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 09/11/2022 15:16, Kalyan Thota wrote: > Pin each crtc with one encoder. This arrangement will > disallow crtc switching between encoders and also will > facilitate to advertise certain features on crtc based > on encoder type. > > Signed-off-by: Kalyan Thota > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 10 +++++----- > 1 file changed, 5 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c > index 7a5fabc..552a89c 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c > @@ -798,19 +798,19 @@ static int _dpu_kms_drm_obj_init(struct dpu_kms *dpu_kms) > max_crtc_count = min(max_crtc_count, primary_planes_idx); > > /* Create one CRTC per encoder */ > + encoder = list_first_entry(&(dev)->mode_config.encoder_list, > + struct drm_encoder, head); Please use drm_for_each_encoder() here. > for (i = 0; i < max_crtc_count; i++) { > crtc = dpu_crtc_init(dev, primary_planes[i], cursor_planes[i]); > - if (IS_ERR(crtc)) { > + if (IS_ERR(crtc) || IS_ERR_OR_NULL(encoder)) { Why? Not to mention that the OR_NULL part is quite frequently a mistake. > ret = PTR_ERR(crtc); > return ret; > } > priv->crtcs[priv->num_crtcs++] = crtc; > + encoder->possible_crtcs = 1 << drm_crtc_index(crtc); > + encoder = list_next_entry(encoder, head); > } > > - /* All CRTCs are compatible with all encoders */ > - drm_for_each_encoder(encoder, dev) > - encoder->possible_crtcs = (1 << priv->num_crtcs) - 1; > - > return 0; > } > -- With best wishes Dmitry