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Mon, 29 Sep 2025 22:45:33 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFaNwtMS+L7JYb6fXEGvaAzNNfpnL39xLAuGz7lefMMjZVgnylqawU22M4IEG2k35nREeiThA== X-Received: by 2002:a17:903:19f0:b0:26c:e270:6dad with SMTP id d9443c01a7336-27ed4ae51c6mr177948835ad.60.1759211133375; Mon, 29 Sep 2025 22:45:33 -0700 (PDT) Received: from [10.151.37.217] ([202.46.23.19]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-27ed68821desm149919235ad.91.2025.09.29.22.45.24 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 29 Sep 2025 22:45:32 -0700 (PDT) Message-ID: <4276eeea-5877-4420-98da-a5f2eb5c0505@oss.qualcomm.com> Date: Tue, 30 Sep 2025 11:15:04 +0530 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v15 07/14] firmware: psci: Implement vendor-specific resets as reboot-mode To: Shivendra Pratap , Bartosz Golaszewski , Bjorn Andersson , Sebastian Reichel , Rob Herring , Sudeep Holla , Souvik Chakravarty , Krzysztof Kozlowski , Conor Dooley , Andy Yan , Mark Rutland , Lorenzo Pieralisi , Arnd Bergmann , Konrad Dybcio , cros-qcom-dts-watchers@chromium.org, Vinod Koul , Catalin Marinas , Will Deacon , Florian Fainelli , Moritz Fischer , John Stultz , Matthias Brugger , Krzysztof Kozlowski Cc: Dmitry Baryshkov , Mukesh Ojha , Stephen Boyd , Andre Draszik , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, Elliot Berman , Srinivas Kandagatla References: <20250922-arm-psci-system_reset2-vendor-reboots-v15-0-7ce3a08878f1@oss.qualcomm.com> <20250922-arm-psci-system_reset2-vendor-reboots-v15-7-7ce3a08878f1@oss.qualcomm.com> Content-Language: en-US From: Kathiravan Thirumoorthy In-Reply-To: <20250922-arm-psci-system_reset2-vendor-reboots-v15-7-7ce3a08878f1@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Authority-Analysis: v=2.4 cv=OJoqHCaB c=1 sm=1 tr=0 ts=68db6e7f cx=c_pps a=MTSHoo12Qbhz2p7MsH1ifg==:117 a=j4ogTh8yFefVWWEFDRgCtg==:17 a=IkcTkHD0fZMA:10 a=yJojWOMRYYMA:10 a=EUspDBNiAAAA:8 a=us_dTBczMLAT1r8_uQAA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=GvdueXVYPmCkWapjIL-Q:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwOTI3MDAzMiBTYWx0ZWRfXyvYck5cqPz89 PkfG8edYI4YpsnPYG7YKsOXKJGD4vP77xtfZFxTRftspO0UYIVH/OOABFf68rozB+JvNugwmGOb 90DZfthV/pR0i3y/u6W0hdTRSnejEcEWaMKhKEvM6SwoaYdC4k3J9oPSPc3ipwqTsgACFUel6dt 7IudGA4zs1r4iMkJqDaW/llHRMk5xny4KaYBp/SI6u8MtLyofCUpdD5ufNIlBfpf4NYQm1cX6Wr WURizPxJTsR5V69DGkG0XfzIK0FOWDkEr20DfIVqKKjw+vba3vpHinovuOI0JdPmYR9KcNBF57r fUPSYtn/NiE5WgdoN3kLiLaAlGa3RS8GnmyFd9eDasqa8tPfNNE87cJ8B6awkMhSwR+XBs7n6rA UJYIPhzvUcrU9fIac5XtMrsWzvlGTg== X-Proofpoint-ORIG-GUID: jVZ-kRqxLnFTS4xpwNN2sMhJerNEqz5D X-Proofpoint-GUID: jVZ-kRqxLnFTS4xpwNN2sMhJerNEqz5D X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-09-30_01,2025-09-29_04,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 adultscore=0 priorityscore=1501 bulkscore=0 impostorscore=0 suspectscore=0 lowpriorityscore=0 phishscore=0 malwarescore=0 clxscore=1011 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2509150000 definitions=main-2509270032 On 9/22/2025 7:10 PM, Shivendra Pratap wrote: > SoC vendors have different types of resets which are controlled > through various hardware registers. For instance, Qualcomm SoC > may have a requirement that reboot with “bootloader” command > should reboot the device to bootloader flashing mode and reboot > with “edl” should reboot the device into Emergency flashing mode. > Setting up such reboots on Qualcomm devices can be inconsistent > across SoC platforms and may require setting different HW > registers, where some of these registers may not be accessible to > HLOS. These knobs evolve over product generations and require > more drivers. PSCI spec defines, SYSTEM_RESET2, vendor-specific > reset which can help align this requirement. Add support for PSCI > SYSTEM_RESET2, vendor-specific resets and align the implementation > to allow user-space initiated reboots to trigger these resets. > > Implement the PSCI vendor-specific resets by registering to the > reboot-mode framework. As psci init is done at early kernel init, > reboot-mode registration cannot be done at the time of psci init. > This is because reboot-mode creates a “reboot-mode” class for > exposing sysfs, which can fail at early kernel init. To overcome > this, introduce a late_initcall to register PSCI vendor-specific > resets as reboot modes. Implement a reboot-mode write function > that sets reset_type and cookie values during the reboot notifier > callback. Introduce a firmware-based call for SYSTEM_RESET2 > vendor-specific reset in the psci_sys_reset path, using > reset_type and cookie if supported by secure firmware. Register a > panic notifier and clear vendor_reset valid status during panic. > This is needed for any kernel panic that occurs post > reboot_notifiers. > > By using the above implementation, userspace will be able to issue > such resets using the reboot() system call with the "*arg" > parameter as a string based command. The commands can be defined > in PSCI device tree node under “reboot-mode” and are based on the > reboot-mode based commands. > > Signed-off-by: Shivendra Pratap > --- > drivers/firmware/psci/Kconfig | 2 + > drivers/firmware/psci/psci.c | 89 ++++++++++++++++++++++++++++++++++++++++++- > 2 files changed, 90 insertions(+), 1 deletion(-) > > diff --git a/drivers/firmware/psci/Kconfig b/drivers/firmware/psci/Kconfig > index 97944168b5e66aea1e38a7eb2d4ced8348fce64b..93ff7b071a0c364a376699733e6bc5654d56a17f 100644 > --- a/drivers/firmware/psci/Kconfig > +++ b/drivers/firmware/psci/Kconfig > @@ -1,6 +1,8 @@ > # SPDX-License-Identifier: GPL-2.0-only > config ARM_PSCI_FW > bool > + select POWER_RESET > + select REBOOT_MODE > > config ARM_PSCI_CHECKER > bool "ARM PSCI checker" > diff --git a/drivers/firmware/psci/psci.c b/drivers/firmware/psci/psci.c > index 38ca190d4a22d6e7e0f06420e8478a2b0ec2fe6f..40a27bc2cc3a3393acc14c7b2314155540ed06c9 100644 > --- a/drivers/firmware/psci/psci.c > +++ b/drivers/firmware/psci/psci.c > @@ -13,10 +13,12 @@ > #include > #include > #include > +#include > #include > #include > #include > #include > +#include > #include > #include > > @@ -51,6 +53,24 @@ static int resident_cpu = -1; > struct psci_operations psci_ops; > static enum arm_smccc_conduit psci_conduit = SMCCC_CONDUIT_NONE; > > +struct psci_vendor_sysreset2 { > + u32 reset_type; > + u32 cookie; > + bool valid; > +}; > + > +static struct psci_vendor_sysreset2 vendor_reset; > + > +static int psci_panic_event(struct notifier_block *nb, unsigned long v, void *p) > +{ > + vendor_reset.valid = false; > + return NOTIFY_DONE; > +} > + > +static struct notifier_block psci_panic_block = { > + .notifier_call = psci_panic_event > +}; > + > bool psci_tos_resident_on(int cpu) > { > return cpu == resident_cpu; > @@ -309,7 +329,10 @@ static int get_set_conduit_method(const struct device_node *np) > static int psci_sys_reset(struct notifier_block *nb, unsigned long action, > void *data) > { > - if ((reboot_mode == REBOOT_WARM || reboot_mode == REBOOT_SOFT) && > + if (vendor_reset.valid && psci_system_reset2_supported) { > + invoke_psci_fn(PSCI_FN_NATIVE(1_1, SYSTEM_RESET2), vendor_reset.reset_type, > + vendor_reset.cookie, 0); > + } else if ((reboot_mode == REBOOT_WARM || reboot_mode == REBOOT_SOFT) && > psci_system_reset2_supported) { > /* > * reset_type[31] = 0 (architectural) > @@ -547,6 +570,70 @@ static const struct platform_suspend_ops psci_suspend_ops = { > .enter = psci_system_suspend_enter, > }; > > +static int psci_set_vendor_sys_reset2(struct reboot_mode_driver *reboot, u64 magic) > +{ > + u32 magic_32; > + > + if (psci_system_reset2_supported) { > + magic_32 = magic & 0xffffffff; > + vendor_reset.reset_type = PSCI_1_1_RESET_TYPE_VENDOR_START | magic_32; > + vendor_reset.cookie = (magic >> 32) & 0xffffffff; Minor Nit: Can we use GENMASK(31, 0) instead of 0xffffffff? Apart from this, change LGTM. With that, Reviewed-by: Kathiravan Thirumoorthy > + vendor_reset.valid = true; > + } > + > + return NOTIFY_DONE; > +} > + > +static int __init psci_init_vendor_reset(void) > +{ > + struct reboot_mode_driver *reboot; > + struct device_node *psci_np; > + struct device_node *np; > + int ret; > + > + if (!psci_system_reset2_supported) > + return -EINVAL; > + > + psci_np = of_find_compatible_node(NULL, NULL, "arm,psci-1.0"); > + if (!psci_np) > + return -ENODEV; > + > + np = of_find_node_by_name(psci_np, "reboot-mode"); > + if (!np) { > + of_node_put(psci_np); > + return -ENODEV; > + } > + > + ret = atomic_notifier_chain_register(&panic_notifier_list, &psci_panic_block); > + if (ret) > + goto err_notifier; > + > + reboot = kzalloc(sizeof(*reboot), GFP_KERNEL); > + if (!reboot) { > + ret = -ENOMEM; > + goto err_kzalloc; > + } > + > + reboot->write = psci_set_vendor_sys_reset2; > + reboot->driver_name = "psci"; > + > + ret = reboot_mode_register(reboot, of_fwnode_handle(np)); > + if (ret) > + goto err_register; > + > + return 0; > + > +err_register: > + kfree(reboot); > +err_kzalloc: > + atomic_notifier_chain_unregister(&panic_notifier_list, &psci_panic_block); > +err_notifier: > + of_node_put(psci_np); > + of_node_put(np); > + return ret; > +} > +late_initcall(psci_init_vendor_reset) > + > static void __init psci_init_system_reset2(void) > { > int ret; >