Linux ARM-MSM sub-architecture
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From: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
To: Stephen Boyd <swboyd@chromium.org>, <agross@kernel.org>,
	<bjorn.andersson@linaro.org>, <devicetree@vger.kernel.org>,
	<dianders@chromium.org>, <judyhsiao@chromium.org>,
	<linux-arm-msm@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<robh+dt@kernel.org>, <rohitkr@codeaurora.org>,
	<srinivas.kandagatla@linaro.org>
Cc: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Subject: Re: [PATCH v2 2/3] arm64: dts: qcom: sc7280: add lpass lpi pin controller node
Date: Thu, 10 Feb 2022 19:57:49 +0530	[thread overview]
Message-ID: <42e27aa2-afb6-656d-9b56-c822a8c510ad@quicinc.com> (raw)
In-Reply-To: <CAE-0n51o3ohrVO-HCeVOTz=JwePA63yMrNpFsY4sFOiv6rQwEA@mail.gmail.com>


On 2/10/2022 5:35 AM, Stephen Boyd wrote:
Thanks for Your time Stephen!!!
> Quoting Srinivasa Rao Mandadapu (2022-02-09 06:01:21)
>> On 2/9/2022 2:41 AM, Stephen Boyd wrote:
>>> Quoting Srinivasa Rao Mandadapu (2022-02-08 07:34:13)
>>>> +                       data {
>>>> +                               pins = "gpio7";
>>>> +                               function = "dmic1_data";
>>>> +                               drive-strength = <8>;
>>>> +                               input-enable;
>>>> +                       };
>>>> +               };
>>>> +
>>>> +               dmic01_sleep: dmic01-sleep-pins {
>>>> +                       clk {
>>>> +                               pins = "gpio6";
>>>> +                               function = "dmic1_clk";
>>>> +                               drive-strength = <2>;
>>>> +                               bias-disable;
>>>> +                               output-low;
>>>> +                       };
>>>> +
>>>> +                       data {
>>>> +                               pins = "gpio7";
>>>> +                               function = "dmic1_data";
>>>> +                               drive-strength = <2>;
>>>> +                               pull-down;
>>>> +                               input-enable;
>>> Why does input-enable matter? It's not a gpio.
>> Actually the same is fallowed in sm8250.dtsi. Verified without it and
>> working fine. Need take call on it.
> Is that because the pin is already an input by default? What does gpio
> debugfs say for this pin? Does it also work if you make it
> output-low/output-high here? I thought that the gpio itself isn't muxed
> out to the pad unless the function is "gpio" so I hope the input/output
> settings have no effect here.

Pin is in by default. debugfs says

gpio7 : in 1 8mA no pull

verified in downstream code also. Same is followed there also.


  reply	other threads:[~2022-02-10 14:28 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-08 15:34 [PATCH v2 0/3] Add lpass pin control support for audio on sc7280 based targets Srinivasa Rao Mandadapu
2022-02-08 15:34 ` [PATCH v2 1/3] arm64: dts: qcom: sc7280: Add pinmux for I2S speaker and Headset Srinivasa Rao Mandadapu
2022-02-08 21:08   ` Stephen Boyd
2022-02-09 13:42     ` Srinivasa Rao Mandadapu
2022-02-10  0:07       ` Stephen Boyd
2022-02-10 14:01         ` Srinivasa Rao Mandadapu
2022-02-08 15:34 ` [PATCH v2 2/3] arm64: dts: qcom: sc7280: add lpass lpi pin controller node Srinivasa Rao Mandadapu
2022-02-08 21:11   ` Stephen Boyd
2022-02-09 14:01     ` Srinivasa Rao Mandadapu
2022-02-10  0:05       ` Stephen Boyd
2022-02-10 14:27         ` Srinivasa Rao Mandadapu [this message]
2022-02-08 15:34 ` [PATCH v2 3/3] arm64: dts: qcom: sc7280: Add wcd9380 pinmux Srinivasa Rao Mandadapu
2022-02-08 21:12   ` Stephen Boyd
2022-02-09 14:26     ` Srinivasa Rao Mandadapu
2022-02-10  0:03       ` Stephen Boyd
2022-02-10 14:29         ` Srinivasa Rao Mandadapu

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