From: Krzysztof Kozlowski <krzk@kernel.org>
To: Cong Zhang <quic_congzhan@quicinc.com>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: quic_pkondeti@quicinc.com, quic_aiquny@quicinc.com,
kernel@quicinc.com, linux-arm-msm@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] arm64: dts: qcom: Correct IRQ number of EL2 non-secure physical timer
Date: Wed, 27 Nov 2024 10:37:51 +0100 [thread overview]
Message-ID: <42e3293d-a7dd-4b39-8e36-45b1f31f8b01@kernel.org> (raw)
In-Reply-To: <20241127-correct_timer_irq-v1-1-ce4309b655bd@quicinc.com>
On 27/11/2024 10:32, Cong Zhang wrote:
> The INTID of EL2 non-secure physical timer is 26. In linux, the IRQ
> number has a fixed 16 offset for PPIs. Therefore, the linux IRQ number
> of EL2 non-secure physical timer should be 10 (26 - 16).
>
> Signed-off-by: Cong Zhang <quic_congzhan@quicinc.com>
> ---
> The EL2 non-secure physical timer is utilized during kernel bootup in
> EL2 mode with KVM enabled. This patch has been verified on the QCS8300
> platform with KVM enabled. Given that the dependency patch has already
> been reviewed, I am uncertain whether it is preferable to submit this
> fix as a new patch or to combine it with the dependency patch. I would
> appreciate your suggestions on this patch.
> ---
> arch/arm64/boot/dts/qcom/qcs8300.dtsi | 2 +-
This was not merged. Do not post fixes to things which are still patches
on mailing list.
Best regards,
Krzysztof
next prev parent reply other threads:[~2024-11-27 9:37 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-27 9:32 [PATCH] arm64: dts: qcom: Correct IRQ number of EL2 non-secure physical timer Cong Zhang
2024-11-27 9:37 ` Krzysztof Kozlowski [this message]
2024-12-05 10:24 ` Cong Zhang
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