[PATCH v3 02/11] coresight-tpda: Add DSB dataset support

Tao Zhang
2023-03-23T06:05:20Z

Read the DSB element size from the device tree. Set the register
bit that controls the DSB element size of the corresponding port.

Signed-off-by: Tao Zhang <quic_taozha@quicinc.com>
---
drivers/hwtracing/coresight/coresight-tpda.c | 58 ++++++++++++++++++++++++++++
drivers/hwtracing/coresight/coresight-tpda.h | 4 ++
2 files changed, 62 insertions(+)

diff --git a/drivers/hwtracing/coresight/coresight-tpda.c b/drivers/hwtracing/coresight/coresight-tpda.c
index f712e11..8dcfc4a 100644
--- a/drivers/hwtracing/coresight/coresight-tpda.c
+++ b/drivers/hwtracing/coresight/coresight-tpda.c
@@ -21,6 +21,47 @@

DEFINE_CORESIGHT_DEVLIST(tpda_devs, "tpda");

+/* Search and read element data size from the TPDM node in
+ * the devicetree. Each input port of TPDA is connected to
+ * a TPDM. Different TPDM supports different types of dataset,
+ * and some may support more than one type of dataset.
+ * Parameter "inport" is used to pass in the input port number
+ * of TPDA, and it is set to 0 in the recursize call.
+ * Parameter "parent" is used to pass in the original call.
+ */
+static int tpda_set_element_size(struct tpda_drvdata *drvdata,
+ struct coresight_device *csdev, int inport, bool parent)
+{
+ static int nr_inport;
+ int i;
+ struct coresight_device *in_csdev;
+
+ if (inport > (TPDA_MAX_INPORTS - 1))
+ return -EINVAL;
+
+ if (parent)
+ nr_inport = inport;
+
+ for (i = 0; i < csdev->pdata->nr_inconns; i++) {
+ in_csdev = csdev->pdata->in_conns[i].remote_dev;
+ if (!in_csdev)
+ break;
+
+ if (parent)
+ if (csdev->pdata->in_conns[i].port != inport)
+ continue;
+
+ if (in_csdev && strstr(dev_name(&in_csdev->dev), "tpdm")) {
+ of_property_read_u32(in_csdev->dev.parent->of_node,
+ "qcom,dsb-element-size", &drvdata->dsb_esize[nr_inport]);
+ break;
+ }
+ tpda_set_element_size(drvdata, in_csdev, 0, false);
+ }
+
+ return 0;
+}
+
/* Settings pre enabling port control register */
static void tpda_enable_pre_port(struct tpda_drvdata *drvdata)
{
@@ -37,6 +78,18 @@ static void tpda_enable_port(struct tpda_drvdata *drvdata, int port)
u32 val;

val = readl_relaxed(drvdata->base + TPDA_Pn_CR(port));
+ /*
+ * Configure aggregator port n DSB data set element size
+ * Set the bit to 0 if the size is 32
+ * Set the bit to 1 if the size is 64
+ */
+ if (drvdata->dsb_esize[port] == 32)
+ val &= ~TPDA_Pn_CR_DSBSIZE;
+ else if (drvdata->dsb_esize[port] == 64)
+ val |= TPDA_Pn_CR_DSBSIZE;
+ else
+ dev_err(drvdata->dev,
+ "DSB data size input from port[%d] is invalid\n", port);
/* Enable the port */
val |= TPDA_Pn_CR_ENA;
writel_relaxed(val, drvdata->base + TPDA_Pn_CR(port));
@@ -57,6 +110,11 @@ static void __tpda_enable(struct tpda_drvdata *drvdata, int port)
static int tpda_enable(struct coresight_device *csdev, int inport, int outport)
{
struct tpda_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
+ int ret;
+
+ ret = tpda_set_element_size(drvdata, csdev, inport, true);
+ if (ret)
+ return ret;

spin_lock(&drvdata->spinlock);
if (atomic_read(&csdev->refcnt[inport]) == 0)
diff --git a/drivers/hwtracing/coresight/coresight-tpda.h b/drivers/hwtracing/coresight/coresight-tpda.h
index 0399678..9ec5870 100644
--- a/drivers/hwtracing/coresight/coresight-tpda.h
+++ b/drivers/hwtracing/coresight/coresight-tpda.h
@@ -10,6 +10,8 @@
#define TPDA_Pn_CR(n) (0x004 + (n * 4))
/* Aggregator port enable bit */
#define TPDA_Pn_CR_ENA BIT(0)
+/* Aggregator port DSB data set element size bit */
+#define TPDA_Pn_CR_DSBSIZE BIT(8)

#define TPDA_MAX_INPORTS 32

@@ -23,6 +25,7 @@
* @csdev: component vitals needed by the framework.
* @spinlock: lock for the drvdata value.
* @enable: enable status of the component.
+ * @dsb_esize: DSB element size
*/
struct tpda_drvdata {
void __iomem *base;
@@ -30,6 +33,7 @@ struct tpda_drvdata {
struct coresight_device *csdev;
spinlock_t spinlock;
u8 atid;
+ u32 dsb_esize[TPDA_MAX_INPORTS];
};

#endif /* _CORESIGHT_CORESIGHT_TPDA_H */
--
2.7.4