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[83.9.32.99]) by smtp.gmail.com with ESMTPSA id d25-20020ac25459000000b004db2b111bf3sm1665832lfn.21.2023.03.06.06.59.07 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 06 Mar 2023 06:59:07 -0800 (PST) Message-ID: <49f2efcf-da1b-051e-6396-a6f4f0b9a97a@linaro.org> Date: Mon, 6 Mar 2023 15:59:06 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.8.0 Subject: Re: [PATCH v3 8/9] arm64: dts: qcom: sa8775p-ride: enable the GNSS UART port Content-Language: en-US To: Bartosz Golaszewski , Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Bartosz Golaszewski References: <20230216125257.112300-1-brgl@bgdev.pl> <20230216125257.112300-9-brgl@bgdev.pl> From: Konrad Dybcio In-Reply-To: <20230216125257.112300-9-brgl@bgdev.pl> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 16.02.2023 13:52, Bartosz Golaszewski wrote: > From: Bartosz Golaszewski > > Enable the high-speed UART port connected to the GNSS controller on the > sa8775p-adp development board. > > Signed-off-by: Bartosz Golaszewski > --- > arch/arm64/boot/dts/qcom/sa8775p-ride.dts | 34 +++++++++++++++++++++++ > 1 file changed, 34 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts > index d01ca3a9ee37..6f96907b335c 100644 > --- a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts > +++ b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts > @@ -13,6 +13,7 @@ / { > > aliases { > serial0 = &uart10; > + serial1 = &uart12; > i2c18 = &i2c18; > spi16 = &spi16; > }; > @@ -66,6 +67,30 @@ qup_i2c18_default: qup-i2c18-state { > drive-strength = <2>; > bias-pull-up; > }; > + qup_uart12_default: [...] { qup_uart12_cts: [...] }; [...] pinctrl-0 = <&qup_uart12_default>; ? Konrad > + qup_uart12_cts: qup-uart12-cts-state { > + pins = "gpio52"; > + function = "qup1_se5"; > + bias-disable; > + }; > + > + qup_uart12_rts: qup-uart12-rts-state { > + pins = "gpio53"; > + function = "qup1_se5"; > + bias-pull-down; > + }; > + > + qup_uart12_tx: qup-uart12-tx-state { > + pins = "gpio54"; > + function = "qup1_se5"; > + bias-pull-up; > + }; > + > + qup_uart12_rx: qup-uart12-rx-state { > + pins = "gpio55"; > + function = "qup1_se5"; > + bias-pull-down; > + }; > }; > > &uart10 { > @@ -75,6 +100,15 @@ &uart10 { > status = "okay"; > }; > > +&uart12 { > + pinctrl-0 = <&qup_uart12_cts>, > + <&qup_uart12_rts>, > + <&qup_uart12_tx>, > + <&qup_uart12_rx>; > + pinctrl-names = "default"; > + status = "okay"; > +}; > + > &xo_board_clk { > clock-frequency = <38400000>; > };