From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from wolverine01.qualcomm.com ([199.106.114.254]:45796 "EHLO wolverine01.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752322Ab0K0OAX (ORCPT ); Sat, 27 Nov 2010 09:00:23 -0500 Message-ID: <4CF10EF0.4010309@codeaurora.org> Date: Sat, 27 Nov 2010 19:30:16 +0530 From: Pavan Kondeti MIME-Version: 1.0 Subject: Re: [PATCH v2] USB: Add MSM USB Device Controller driver References: <20101110021259.GA16558@codeaurora.org> <320241.1412.qm@web180311.mail.gq1.yahoo.com> <4CE6B0E0.2030900@parrot.com> In-Reply-To: <4CE6B0E0.2030900@parrot.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Sender: linux-arm-msm-owner@vger.kernel.org List-ID: To: Matthieu CASTET Cc: Brian Swetland , David Brownell , "greg@kroah.com" , "linux-usb@vger.kernel.org" , "linux-arm-msm@vger.kernel.org" , Mike Lockwood On 11/19/2010 10:46 PM, Matthieu CASTET wrote: > Hi, > > Brian Swetland a écrit : >> On Tue, Nov 9, 2010 at 6:54 PM, David Brownell >> wrote: >>> >>> --- On Tue, 11/9/10, Pavan Kondeti wrote: >>> >>>>>> Hi Matthieu, >>>>>> >>>>>>> This look like the arc/chipidea/mips ehci otg >>>> core. >>>>>> Yes. It is chipidea core for ARM. >>>>>>> Why can't you reuse the ci13xxx_udc.c driver >>> That basic approach is FAR PREFERABLE. Fix >>> the bugs once, tune once, and so forth, reuse >>> the ULPI support, etc. Work on more >>> platforms, since the silicon IP is reused. >>> >>> You'll end up with more folk who can help >>> maintain the driver too, since the pool of >>> potential helpers won't be limited to those >>> who have/use MSM hardware. >>> >>> Just be sure to cleanly factor the bus >>> (PCI vs MSM-s ARM platform flavor and >>> SoC glues (bus-related). That factoring >>> will likely be the hardest part; but there >>> are examples of similar stuff in Linux today. >> >> The main headache is that this particular IP has different bugs in >> different instantiations (I know, for example, it exists in Tegra with >> a different set of issues around fetching descriptor heads and cache >> alignment, on MSM7201A after extensive testing we discovered there was >> no reliable way of adding a descriptor to a list of transactions once >> that queue was active, etc...), so things that work in one SoC may >> break another, etc, etc, but that's part of the adventure I suppose. >> I certainly agree that one unified driver is the way to go if you can >> make it all work. >> > The best way to handle this is to introduce flags in the driver. For > example look at drivers/mmc/host/sdhci.c (quirk flags). > > But for now, let's make work msm version. We can add workaround for > other controller later. > I am working on separating PCI stuff from ci13xxx_udc driver and implementing specific hooks needed for MSM. I am relying on gadget_is_xxx() macro for MSM specific workarounds. -- Sent by a consultant of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.