From: James Clark <james.clark@linaro.org>
To: Jie Gan <jie.gan@oss.qualcomm.com>
Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Mike Leach <mike.leach@linaro.org>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Tingwei Zhang <tingwei.zhang@oss.qualcomm.com>
Subject: Re: [PATCH v2 2/3] coresight: tpda: add logic to configure TPDA_SYNCR register
Date: Wed, 27 Aug 2025 10:21:25 +0100 [thread overview]
Message-ID: <4ca657cf-1c8e-4d51-aba9-c894c32a23b3@linaro.org> (raw)
In-Reply-To: <20250827042042.6786-3-jie.gan@oss.qualcomm.com>
On 27/08/2025 5:20 am, Jie Gan wrote:
> From: Tao Zhang <tao.zhang@oss.qualcomm.com>
>
> The TPDA_SYNCR register defines the frequency at which TPDA generates
> ASYNC packets, enabling userspace tools to accurately parse each valid
> packet.
>
> Signed-off-by: Tao Zhang <tao.zhang@oss.qualcomm.com>
> Co-developed-by: Jie Gan <jie.gan@oss.qualcomm.com>
> Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
> ---
> drivers/hwtracing/coresight/coresight-tpda.c | 7 +++++++
> drivers/hwtracing/coresight/coresight-tpda.h | 6 ++++++
> 2 files changed, 13 insertions(+)
>
> diff --git a/drivers/hwtracing/coresight/coresight-tpda.c b/drivers/hwtracing/coresight/coresight-tpda.c
> index 647ab49a98d7..430f76c559f2 100644
> --- a/drivers/hwtracing/coresight/coresight-tpda.c
> +++ b/drivers/hwtracing/coresight/coresight-tpda.c
> @@ -187,6 +187,13 @@ static void tpda_enable_pre_port(struct tpda_drvdata *drvdata)
> */
> if (drvdata->trig_flag_ts)
> writel_relaxed(0x0, drvdata->base + TPDA_FPID_CR);
> +
> + /* Program the counter value for TPDA_SYNCR */
> + val = readl_relaxed(drvdata->base + TPDA_SYNCR);
> + /* Clear the mode */
> + val &= ~TPDA_SYNCR_MODE_CTRL;
> + val |= FIELD_PREP(TPDA_SYNCR_COUNTER_MASK, TPDA_SYNCR_MAX_COUNTER_VAL);
Just use the mask directly if you want to set all the bits. This makes
it seem like the MAX_COUNTER_VAL is something different.
val |= TPDA_SYNCR_COUNTER_MASK
> + writel_relaxed(val, drvdata->base + TPDA_SYNCR);
> }
>
> static int tpda_enable_port(struct tpda_drvdata *drvdata, int port)
> diff --git a/drivers/hwtracing/coresight/coresight-tpda.h b/drivers/hwtracing/coresight/coresight-tpda.h
> index 0be625fb52fd..8e1b66115ad1 100644
> --- a/drivers/hwtracing/coresight/coresight-tpda.h
> +++ b/drivers/hwtracing/coresight/coresight-tpda.h
> @@ -9,6 +9,7 @@
> #define TPDA_CR (0x000)
> #define TPDA_Pn_CR(n) (0x004 + (n * 4))
> #define TPDA_FPID_CR (0x084)
> +#define TPDA_SYNCR (0x08C)
>
> /* Cross trigger FREQ packets timestamp bit */
> #define TPDA_CR_FREQTS BIT(2)
> @@ -27,6 +28,11 @@
> #define TPDA_Pn_CR_CMBSIZE GENMASK(7, 6)
> /* Aggregator port DSB data set element size bit */
> #define TPDA_Pn_CR_DSBSIZE BIT(8)
> +/* TPDA_SYNCR mode control bit */
> +#define TPDA_SYNCR_MODE_CTRL BIT(12)
> +/* TPDA_SYNCR counter mask */
> +#define TPDA_SYNCR_COUNTER_MASK GENMASK(11, 0)
> +#define TPDA_SYNCR_MAX_COUNTER_VAL (0xFFF)
No need to define a numeric value that's the same as the mask. It also
opens the possibility of making a mistake.
>
> #define TPDA_MAX_INPORTS 32
>
next prev parent reply other threads:[~2025-08-27 9:21 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-27 4:20 [PATCH v2 0/3] add sysfs nodes to configure TPDA's registers Jie Gan
2025-08-27 4:20 ` [PATCH v2 1/3] coresight: tpda: add sysfs nodes for tpda cross-trigger configuration Jie Gan
2025-08-27 9:06 ` James Clark
2025-08-27 9:18 ` Jie Gan
2025-08-27 4:20 ` [PATCH v2 2/3] coresight: tpda: add logic to configure TPDA_SYNCR register Jie Gan
2025-08-27 9:21 ` James Clark [this message]
2025-08-27 9:52 ` Jie Gan
2025-08-27 4:20 ` [PATCH v2 3/3] coresight: tpda: add sysfs node to flush specific port Jie Gan
2025-08-27 9:17 ` James Clark
2025-08-27 9:48 ` Jie Gan
2025-08-27 10:16 ` James Clark
2025-08-27 10:21 ` Jie Gan
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