Linux ARM-MSM sub-architecture
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From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: "Dmitry Baryshkov" <dmitry.baryshkov@linaro.org>,
	"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Rob Herring" <robh@kernel.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Mrinmay Sarkar" <quic_msarkar@quicinc.com>,
	"Bjorn Andersson" <andersson@kernel.org>,
	"Konrad Dybcio" <konradybcio@kernel.org>
Cc: "Krzysztof Wilczyński" <kwilczynski@kernel.org>,
	linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 3/6] dt-bindings: PCI: qcom-ep: add SAR2130P compatible
Date: Fri, 21 Feb 2025 10:59:59 +0100	[thread overview]
Message-ID: <4f95cce5-53b2-4eb9-be28-6136eb89dcaa@linaro.org> (raw)
In-Reply-To: <20250221-sar2130p-pci-v2-3-cc87590ffbeb@linaro.org>

On 21/02/2025 04:06, Dmitry Baryshkov wrote:
>    qcom,perst-regs:
>      description: Reference to a syscon representing TCSR followed by the two
> @@ -129,6 +130,45 @@ required:
>  
>  allOf:
>    - $ref: pci-ep.yaml#
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            enum:
> +              - qcom,sar2130p-pcie-ep
> +    then:
> +      properties:
> +        reg:


minItems: 7

> +          maxItems: 7
> +        reg-names:


minItems: 7


> +          maxItems: 7
> +        clocks:
> +          items:
> +            - description: PCIe Auxiliary clock
> +            - description: PCIe CFG AHB clock
> +            - description: PCIe Master AXI clock
> +            - description: PCIe Slave AXI clock
> +            - description: PCIe Slave Q2A AXI clock
> +            - description: PCIe DDRSS SF TBU clock
> +            - description: PCIe AGGRE NOC AXI clock
> +            - description: PCIe CFG NOC AXI clock
> +            - description: PCIe QMIP AHB clock
> +        clock-names:
> +          items:
> +            - const: aux
> +            - const: cfg
> +            - const: bus_master
> +            - const: bus_slave
> +            - const: slave_q2a
> +            - const: ddrss_sf_tbu
> +            - const: aggre_noc_axi
> +            - const: cnoc_sf_axi
> +            - const: qmip_pcie_ahb
> +        interrupts:


minItems: 3

> +          maxItems: 3
> +        interrupt-names:


minItems: 3

> +          maxItems: 3
> +
>    - if:
>        properties:
>          compatible:
> 


Best regards,
Krzysztof

  reply	other threads:[~2025-02-21 10:00 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-21  3:05 [PATCH v2 0/6] PCI: qcom-ep: add support for using the EP on SAR2130P and SM8450 Dmitry Baryshkov
2025-02-21  3:06 ` [PATCH v2 1/6] dt-bindings: PCI: qcom-ep: describe optional IOMMU Dmitry Baryshkov
2025-02-21  9:57   ` Krzysztof Kozlowski
2025-02-21  3:06 ` [PATCH v2 2/6] dt-bindings: PCI: qcom-ep: enable DMA for SM8450 Dmitry Baryshkov
2025-02-21  9:58   ` Krzysztof Kozlowski
2025-02-21  3:06 ` [PATCH v2 3/6] dt-bindings: PCI: qcom-ep: add SAR2130P compatible Dmitry Baryshkov
2025-02-21  9:59   ` Krzysztof Kozlowski [this message]
2025-02-21  3:06 ` [PATCH v2 4/6] PCI: dwc: pcie-qcom-ep: enable EP support for SAR2130P Dmitry Baryshkov
2025-02-21  3:06 ` [PATCH v2 5/6] arm64: dts: qcom: sar2130p: add PCIe EP device nodes Dmitry Baryshkov
2025-02-21  3:06 ` [PATCH v2 6/6] arm64: dts: qcom: sm8450: " Dmitry Baryshkov

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