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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-62eead54362sm614906a12.36.2025.09.12.04.08.14 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 12 Sep 2025 04:08:16 -0700 (PDT) Message-ID: <503e1fde-39ea-4107-947b-18b705f2bc51@oss.qualcomm.com> Date: Fri, 12 Sep 2025 13:08:13 +0200 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 3/3] clk: qcom: videocc-sm8750: Add video clock controller driver for SM8750 To: Taniya Das , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Ajit Pandey , Imran Shaik , Jagadeesh Kona , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org References: <20250829-sm8750-videocc-v2-v2-0-4517a5300e41@oss.qualcomm.com> <20250829-sm8750-videocc-v2-v2-3-4517a5300e41@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20250829-sm8750-videocc-v2-v2-3-4517a5300e41@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwOTA2MDAzMSBTYWx0ZWRfX6VGADbzLZ0aB Fxe20vkHafg2kwdsqiziK5/IEzLtB5f9tr62WdAs5F//EnP1/6+Z5UZNyLfhavmzxhdIDiGRLTO BNOt6UE39wwOcVo8RWO4pDMM1KQ2GKCDehSJxhRY245DQKvPPtIkjddWekQsMyc3Xcd7AF7UoIg Jw7p4yJvgXNmdGQBlCoftxbZnPAIYzPGJnRZSX8Svel9OV3dTXauyPxZAPV9pCZks6f6Hlvr465 F6RfW9i9nLWpN01qUB6tSjkObfhXlsGyMzqSKEglnhZnOrDB6patagMsCoTSnkr8pTUmmiqwxvy H/QVmzKKrkSuh0fqa+LzzI3SptrHKgDUBHBnV8jiYlWDvd4yfnVKjZASVMkElFjnKgUdE1jNdEr RCn86VvP X-Proofpoint-ORIG-GUID: TI4VK2XsOoIhkHxWJ1g_kkWPyjxxcqOG X-Proofpoint-GUID: TI4VK2XsOoIhkHxWJ1g_kkWPyjxxcqOG X-Authority-Analysis: v=2.4 cv=VIDdn8PX c=1 sm=1 tr=0 ts=68c3ff21 cx=c_pps a=qKBjSQ1v91RyAK45QCPf5w==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=yJojWOMRYYMA:10 a=EUspDBNiAAAA:8 a=MRVLr9g2OpiS_xmof_MA:9 a=QEXdDO2ut3YA:10 a=NFOGd7dJGGMPyQGDc5-O:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-09-12_04,2025-09-11_02,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 spamscore=0 suspectscore=0 bulkscore=0 phishscore=0 adultscore=0 clxscore=1015 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2509060031 On 8/29/25 12:15 PM, Taniya Das wrote: > Add support for the video clock controller for video clients to be able > to request for videocc clocks on SM8750 platform. > > Signed-off-by: Taniya Das > --- [...] > +static int video_cc_sm8750_probe(struct platform_device *pdev) > +{ > + struct regmap *regmap; > + int ret; > + > + ret = devm_pm_runtime_enable(&pdev->dev); > + if (ret) > + return ret; > + > + ret = pm_runtime_resume_and_get(&pdev->dev); > + if (ret) > + return ret; > + > + regmap = qcom_cc_map(pdev, &video_cc_sm8750_desc); > + if (IS_ERR(regmap)) { > + pm_runtime_put(&pdev->dev); > + return PTR_ERR(regmap); > + } > + > + clk_taycan_elu_pll_configure(&video_cc_pll0, regmap, &video_cc_pll0_config); > + > + /* Update DLY_ACCU_RED_SHIFTER_DONE to 0xF for mvs0, mvs0c */ > + regmap_update_bits(regmap, 0x8074, 0x1e00000, 0x1e00000); regmap_update_bits(..., GENMASK(x, y) /* full field width */, 0xf) would be easier for the next person to check against docs in case this needs to ever change or be validated > + regmap_update_bits(regmap, 0x8040, 0x1e00000, 0x1e00000); > + > + regmap_update_bits(regmap, 0x9f24, BIT(0), BIT(0)); The register description mentions a ticket which I believe says this is not necessary in production hardware > + > + /* > + * Keep clocks always enabled: > + * video_cc_ahb_clk > + * video_cc_sleep_clk > + * video_cc_xo_clk > + */ > + regmap_update_bits(regmap, 0x80a4, BIT(0), BIT(0)); > + regmap_update_bits(regmap, 0x80f8, BIT(0), BIT(0)); > + regmap_update_bits(regmap, 0x80d4, BIT(0), BIT(0)); Please use the new _desc infra Konrad