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Thu, 19 Feb 2026 23:08:01 -0800 (PST) X-Received: by 2002:a05:6a21:3391:b0:38b:d93f:bbf5 with SMTP id adf61e73a8af0-39466eb3506mr18203638637.0.1771571281345; Thu, 19 Feb 2026 23:08:01 -0800 (PST) Received: from [10.218.41.33] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-824c6a546edsm21922234b3a.25.2026.02.19.23.07.57 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 19 Feb 2026 23:08:00 -0800 (PST) Message-ID: <52c46cfb-891d-49db-8d84-b8994bc9ed9d@oss.qualcomm.com> Date: Fri, 20 Feb 2026 12:37:55 +0530 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/1] arm64: dts: qcom: monaco-evk: Add Mezzanine To: Bjorn Andersson Cc: konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, richardcochran@gmail.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, mohd.anwar@oss.qualcomm.com, krishna.chundru@oss.qualcomm.com, monish.chunara@oss.qualcomm.com References: <20260210103821.4169-1-umang.chheda@oss.qualcomm.com> <20260210103821.4169-2-umang.chheda@oss.qualcomm.com> Content-Language: en-US From: Umang Chheda In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=Voguwu2n c=1 sm=1 tr=0 ts=69980852 cx=c_pps a=Oh5Dbbf/trHjhBongsHeRQ==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=HzLeVaNsDn8A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=Mpw57Om8IfrbqaoTuvik:22 a=GgsMoib0sEa3-_RKJdDe:22 a=GaVuqHfzAwwAF55UOU8A:9 a=QEXdDO2ut3YA:10 a=_Vgx9l1VpLgwpw_dHYaR:22 X-Proofpoint-ORIG-GUID: M8VUaDuDzQxA-ySbqtmCBZjYMWORCibb X-Proofpoint-GUID: M8VUaDuDzQxA-ySbqtmCBZjYMWORCibb X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMjIwMDA2MSBTYWx0ZWRfXwNUp0zL8mx0Y QvNet8E4OYo7FNAlmBpHaKDCA3iA8CysA6aHc3co0S7OC6/UkrCACuxCfCXcbO9h51bxDNAVXBi R/r4EX/su5N6lKgt2qAAvidsmB1QZn8IrskdrLIAKEMRI+h5QAvPuessWl6bUTyz3bPx9XcjIif wgSB94ICOgJkQKugYymKMwcnSoortbDpqGrqJOuXoobmHLzNSQqsLLG+z9ezFqwaS1QEXzowjOC ceBMy4cPA2t6iSO6TbebUi3WX69n90ggWMD19zj8yREgVFlqeY+0rW+GZV4SJRno4X6UuSBphS0 eGD+kWdduzicmOOBz8GE3wGAxWB4U82xColFJPRcDwxIiGMRQTdpvrP+4PaX/6rqmOT2xUK6a3i 3ittqIE7Fws2tHcNwOcrK5/WFow5U02dzoI1oE67+ushHFftjMk0AUgncAisg3gZLVZnP2JqPZF hmdhsLJFzFgQ06geCvA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-02-19_06,2026-02-20_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 impostorscore=0 spamscore=0 clxscore=1015 priorityscore=1501 bulkscore=0 adultscore=0 suspectscore=0 phishscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2602200061 On 2/18/2026 2:26 AM, Bjorn Andersson wrote: > On Mon, Feb 16, 2026 at 01:44:40PM +0530, Umang Chheda wrote: >> Hello Bjorn, >> >> On 2/13/2026 1:33 AM, Bjorn Andersson wrote: >>> On Tue, Feb 10, 2026 at 04:08:21PM +0530, Umang Chheda wrote: >>>> diff --git a/arch/arm64/boot/dts/qcom/monaco-evk-mezzanine.dtso b/arch/arm64/boot/dts/qcom/monaco-evk-mezzanine.dtso >>> [..] >>>> +&i2c15 { >>>> + #address-cells = <1>; >>>> + #size-cells = <0>; >>> Do we need to repeat this? It's in the top-level i2c15 definition >>> already? >> Yes this is required to be repeated in case of DTSO -- else seeing DT >> binding error if these cells are not added here. Seems the compiler is >> not looking at what is present in the Base DT first and is considering >> the default values for address and size cells and throwing error. Had >> to add similarly add for PCIe node as well to suppress binding errors. >> > Understood, no concerns then. Thanks for helping me understand. > >>>> + >>>> + status = "okay"; >>> I presume this overlay is used on top of monaco-evk.dtb, which already >>> says that status is okay. >> Ack >> >>> >>> That said, I don't see a "clock-frequency" in either node, so I presume >>> you have an error/warning in your kernel log about this. But unless you >>> have reason to change that in your overlay, I think that's a unrelated >>> patch on the monaco-evk.dts - which I would like you to send, separately. >> >> Ack, will share a separate patch to fix this issue. >> >>>> + >>>> + eeprom1: eeprom@52 { >>>> + compatible = "giantec,gt24c256c", "atmel,24c256"; >>>> + reg = <0x52>; >>>> + pagesize = <64>; >>>> + >>>> + nvmem-layout { >>>> + compatible = "fixed-layout"; >>>> + #address-cells = <1>; >>>> + #size-cells = <1>; >>>> + }; >>>> + }; >>>> +}; >>>> + >>> [..] >>>> +&tlmm { >>>> + tc9563_resx_n: tc9563-resx-state { >>>> + pins = "gpio124"; >>>> + function = "gpio"; >>>> + >>>> + bias-disable; >>>> + input-disable; >>>> + output-enable; >>>> + power-source = <0>; >>> Does these properties really match the TLMM binding? Please double >>> check. >> Double checked on this -- all the properties match the TLMM bindings. >> > I do believe the logic is binary, so input-disable == output-enable (in > contrast to the SPMI gpio binding, where those two are configured > separately). It's not listed among the valid properties for a > qcom-tlmm-state object, but perhaps I'm misremembering how the > dt-validator uses those properties Apologize for the earlier comment, I agree it applies for the SPMI GPIO. I will remove input-disable and output-enable properties and add output-high which aligns with the bindings. > > But there's no "power-source" for TLMM, you should see an "Unsupported > config parameter" in the kernel log when you try to apply this setting. Ack, This property is valid only for the SPMI GPIO and not for the TLMM GPIO. will remove this property. > > Regards, > Bjorn > >>> Regards, >>> Bjorn >>> >>>> + }; >>>> +}; >>>> -- >>>> 2.34.1 >> >> Thanks, >> Umang Thanks, Umang