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From: Stephen Boyd <sboyd@codeaurora.org>
To: Kumar Gala <galak@codeaurora.org>
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>,
	linux-arm-msm <linux-arm-msm@vger.kernel.org>,
	Andy Gross <agross@codeaurora.org>,
	Mike Turquette <mturquette@linaro.org>
Subject: Re: [RFC PATCH 1/2] soc: qcom: do not disable the iface clock in probe
Date: Tue, 10 Jun 2014 10:39:02 -0700	[thread overview]
Message-ID: <539742B6.7030303@codeaurora.org> (raw)
In-Reply-To: <6D685866-4AE5-458B-BB8C-EFEBAE221A9E@codeaurora.org>

On 06/10/14 08:20, Kumar Gala wrote:
> On Jun 10, 2014, at 9:31 AM, Srinivas Kandagatla <srinivas.kandagatla@linaro.org> wrote:
>
>> The use case here is when we have a bootconsole which is printing the
>> characters on serial console and gsbi driver comes up after some time.
>> As gsbi driver disables the clock in probe the bootconsole locks up.
>>
>> This patch fixes the problem by disabling the clock in platform remove
>> rather than in probe.
>>
>> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
>> ---
>> drivers/soc/qcom/qcom_gsbi.c | 46 +++++++++++++++++++++++++++++++-------------
>> 1 file changed, 33 insertions(+), 13 deletions(-)
> It seems like we shouldn’t need this change.  Adding Stephen to see if there is a reason we don’t have the clk’s enable_count adjusted for how the bootloader setup clks.

This is a long standing problem with the clock framework. In our vendor
tree we've added something called "handoff" which basically detects the
state of all clocks upon registration and keeps clocks enabled until
late_init() if the clocks were enabled at the time of registration.

For this case though "handoff" doesn't seem necessary. It's easier to
just disable the clock when the driver is removed. With finer grained
power management this driver can participate in runtime_pm and disable
the ahb clock when the device is runtime suspended; which would only
happen when the child devices (uart/spi/i2c) are also runtime suspended.

> - k
>
>> diff --git a/drivers/soc/qcom/qcom_gsbi.c b/drivers/soc/qcom/qcom_gsbi.c
>> index ab7b441..64fb298 100644
>> --- a/drivers/soc/qcom/qcom_gsbi.c
>> +++ b/drivers/soc/qcom/qcom_gsbi.c
>> @@ -22,44 +22,63 @@
>> #define GSBI_CTRL_REG		0x0000
>> #define GSBI_PROTOCOL_SHIFT	4
>>
>> +struct gsbi_info {
>> +	struct clk *hclk;
>> +	u32 mode;
>> +	u32 crci;
>> +};

What does mode and crci have to do with this patch? Can't we just put
the clock into the platform data?

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation

  reply	other threads:[~2014-06-10 17:39 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-06-10 14:31 [RFC PATCH 0/2] MSM/QCOM: Fix few race conditions when DEBUG_LL is enabled Srinivas Kandagatla
2014-06-10 14:31 ` [RFC PATCH 1/2] soc: qcom: do not disable the iface clock in probe Srinivas Kandagatla
2014-06-10 15:20   ` Kumar Gala
2014-06-10 17:39     ` Stephen Boyd [this message]
2014-06-10 17:46       ` Andy Gross
2014-06-10 17:47       ` Srinivas Kandagatla
2014-06-10 17:57         ` Andy Gross
2014-07-17 20:18   ` Srinivas Kandagatla
2014-08-12  4:25   ` Srinivas Kandagatla
2014-06-10 14:32 ` [RFC PATCH 2/2] tty:msm_serial: Do not reset IP if we use bootconsole Srinivas Kandagatla
2014-06-10 14:37   ` Srinivas Kandagatla
2014-06-17 21:09   ` Stephen Boyd
2014-06-17 22:04     ` Srinivas Kandagatla
2014-07-10 13:38     ` Srinivas Kandagatla

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