From mboxrd@z Thu Jan  1 00:00:00 1970
From: Pramod Gurav <pramod.gurav@smartplayin.com>
Subject: Re: [PATCH v2 07/10] qcom: msm-pm: Add cpu low power mode functions
Date: Thu, 14 Aug 2014 19:08:21 +0530
Message-ID: <53ECBBCD.6050006@smartplayin.com>
References: <1407872640-6732-1-git-send-email-lina.iyer@linaro.org> <1407872640-6732-8-git-send-email-lina.iyer@linaro.org>
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To: Lina Iyer <lina.iyer@linaro.org>
Cc: daniel.lezcano@linaro.org, khilman@linaro.org, amit.kucheria@linaro.org, sboyd@codeaurora.org, davidb@codeaurora.org, galak@codeaurora.org, linux-arm-msm@vger.kernel.org, msivasub@codeaurora.org, Venkat Devarasetty <vdevaras@codeaurora.org>

On Wednesday 13 August 2014 01:13 AM, Lina Iyer wrote:
> Add interface layer to abstract and handle hardware specific
> functionality for executing various cpu low power modes in QCOM
> chipsets.
> 
> Signed-off-by: Venkat Devarasetty <vdevaras@codeaurora.org>
> Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
> Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
> ---
>  drivers/soc/qcom/Makefile |   2 +-
>  drivers/soc/qcom/msm-pm.c | 219 ++++++++++++++++++++++++++++++++++++++++++++++
>  include/soc/qcom/pm.h     |  39 +++++++++

<snip>

> +{
> +	u32 cache_id = 0;
> +
> +#if defined(CONFIG_CPU_V7)
> +	u32 sel = 0;
> +
> +	asm volatile ("mcr p15, 2, %[ccselr], c0, c0, 0\n\t"
> +		      "isb\n\t"
> +		      "mrc p15, 1, %[ccsidr], c0, c0, 0\n\t"
> +		      :[ccsidr]"=r" (cache_id)
> +		      :[ccselr]"r" (sel)

Space after ':' is what checkpatch asks. :)

> +		     );
> +	return cache_id & BIT(30);
> +#elif defined(CONFIG_ARM64)
> +	u32 sel = 0;

new line missing after declaration.

> +	asm volatile("msr csselr_el1, %[ccselr]\n\t"
> +		     "isb\n\t"
> +		     "mrs %[ccsidr],ccsidr_el1\n\t"
> +		     :[ccsidr]"=r" (cache_id)
> +		     :[ccselr]"r" (sel)

Space after ':' is what checkpatch asks. :)

> +		    );
> +	return cache_id & BIT(30);
> +#else
> +#error No valid CPU arch selected
> +#endif
> +}
> +

>