From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Boyd Subject: Re: [PATCH] clk: qcom: Fix sdc 144kHz frequency entry Date: Tue, 02 Sep 2014 15:01:15 -0700 Message-ID: <54063E2B.6090403@codeaurora.org> References: <1409341766-24366-1-git-send-email-sboyd@codeaurora.org> <20140902214402.5251.75274@quantum> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Return-path: Received: from smtp.codeaurora.org ([198.145.11.231]:40310 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752135AbaIBWBR (ORCPT ); Tue, 2 Sep 2014 18:01:17 -0400 In-Reply-To: <20140902214402.5251.75274@quantum> Sender: linux-arm-msm-owner@vger.kernel.org List-Id: linux-arm-msm@vger.kernel.org To: Mike Turquette Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Kumar Gala , Andy Gross On 09/02/14 14:44, Mike Turquette wrote: > Quoting Stephen Boyd (2014-08-29 12:49:26) >> The pre-divider for the sdc clocks only has 2 bits in it, so we >> can't possibly divide by anything larger than 4 here. >> Furthermore, we program the value of ~(n - m) and the n value is >> larger than 8 bits (max of 256). Replace this entry with 200kHz >> which is close enough to 144kHz to be usable. >> >> Cc: Kumar Gala >> Cc: Andy Gross >> Fixes: 24d8fba44af3 "clk: qcom: Add support for IPQ8064's global clock controller (GCC)" >> Signed-off-by: Stephen Boyd > Do you need this pulled into a 3.17-rc? > Yes that would be helpful since this fixes a driver introduced into 3.17. -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation