* [PATCH] clk: qcom: Fix sdc 144kHz frequency entry
@ 2014-08-29 19:49 Stephen Boyd
2014-09-02 21:44 ` Mike Turquette
0 siblings, 1 reply; 4+ messages in thread
From: Stephen Boyd @ 2014-08-29 19:49 UTC (permalink / raw)
To: Mike Turquette
Cc: linux-kernel, linux-arm-msm, linux-arm-kernel, Kumar Gala,
Andy Gross
The pre-divider for the sdc clocks only has 2 bits in it, so we
can't possibly divide by anything larger than 4 here.
Furthermore, we program the value of ~(n - m) and the n value is
larger than 8 bits (max of 256). Replace this entry with 200kHz
which is close enough to 144kHz to be usable.
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Andy Gross <agross@codeaurora.org>
Fixes: 24d8fba44af3 "clk: qcom: Add support for IPQ8064's global clock controller (GCC)"
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
---
drivers/clk/qcom/gcc-ipq806x.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/qcom/gcc-ipq806x.c b/drivers/clk/qcom/gcc-ipq806x.c
index 4032e510d9aa..3b83b7dd78c7 100644
--- a/drivers/clk/qcom/gcc-ipq806x.c
+++ b/drivers/clk/qcom/gcc-ipq806x.c
@@ -1095,7 +1095,7 @@ static struct clk_branch prng_clk = {
};
static const struct freq_tbl clk_tbl_sdc[] = {
- { 144000, P_PXO, 5, 18,625 },
+ { 200000, P_PXO, 2, 2, 125 },
{ 400000, P_PLL8, 4, 1, 240 },
{ 16000000, P_PLL8, 4, 1, 6 },
{ 17070000, P_PLL8, 1, 2, 45 },
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] clk: qcom: Fix sdc 144kHz frequency entry
2014-08-29 19:49 [PATCH] clk: qcom: Fix sdc 144kHz frequency entry Stephen Boyd
@ 2014-09-02 21:44 ` Mike Turquette
2014-09-02 22:01 ` Stephen Boyd
0 siblings, 1 reply; 4+ messages in thread
From: Mike Turquette @ 2014-09-02 21:44 UTC (permalink / raw)
To: Stephen Boyd
Cc: linux-arm-msm, Andy Gross, linux-kernel, linux-arm-kernel,
Kumar Gala
Quoting Stephen Boyd (2014-08-29 12:49:26)
> The pre-divider for the sdc clocks only has 2 bits in it, so we
> can't possibly divide by anything larger than 4 here.
> Furthermore, we program the value of ~(n - m) and the n value is
> larger than 8 bits (max of 256). Replace this entry with 200kHz
> which is close enough to 144kHz to be usable.
>
> Cc: Kumar Gala <galak@codeaurora.org>
> Cc: Andy Gross <agross@codeaurora.org>
> Fixes: 24d8fba44af3 "clk: qcom: Add support for IPQ8064's global clock controller (GCC)"
> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Do you need this pulled into a 3.17-rc?
Regards,
Mike
> ---
> drivers/clk/qcom/gcc-ipq806x.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/qcom/gcc-ipq806x.c b/drivers/clk/qcom/gcc-ipq806x.c
> index 4032e510d9aa..3b83b7dd78c7 100644
> --- a/drivers/clk/qcom/gcc-ipq806x.c
> +++ b/drivers/clk/qcom/gcc-ipq806x.c
> @@ -1095,7 +1095,7 @@ static struct clk_branch prng_clk = {
> };
>
> static const struct freq_tbl clk_tbl_sdc[] = {
> - { 144000, P_PXO, 5, 18,625 },
> + { 200000, P_PXO, 2, 2, 125 },
> { 400000, P_PLL8, 4, 1, 240 },
> { 16000000, P_PLL8, 4, 1, 6 },
> { 17070000, P_PLL8, 1, 2, 45 },
> --
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> hosted by The Linux Foundation
>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] clk: qcom: Fix sdc 144kHz frequency entry
2014-09-02 21:44 ` Mike Turquette
@ 2014-09-02 22:01 ` Stephen Boyd
2014-09-02 23:52 ` Mike Turquette
0 siblings, 1 reply; 4+ messages in thread
From: Stephen Boyd @ 2014-09-02 22:01 UTC (permalink / raw)
To: Mike Turquette
Cc: linux-kernel, linux-arm-msm, linux-arm-kernel, Kumar Gala,
Andy Gross
On 09/02/14 14:44, Mike Turquette wrote:
> Quoting Stephen Boyd (2014-08-29 12:49:26)
>> The pre-divider for the sdc clocks only has 2 bits in it, so we
>> can't possibly divide by anything larger than 4 here.
>> Furthermore, we program the value of ~(n - m) and the n value is
>> larger than 8 bits (max of 256). Replace this entry with 200kHz
>> which is close enough to 144kHz to be usable.
>>
>> Cc: Kumar Gala <galak@codeaurora.org>
>> Cc: Andy Gross <agross@codeaurora.org>
>> Fixes: 24d8fba44af3 "clk: qcom: Add support for IPQ8064's global clock controller (GCC)"
>> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
> Do you need this pulled into a 3.17-rc?
>
Yes that would be helpful since this fixes a driver introduced into 3.17.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] clk: qcom: Fix sdc 144kHz frequency entry
2014-09-02 22:01 ` Stephen Boyd
@ 2014-09-02 23:52 ` Mike Turquette
0 siblings, 0 replies; 4+ messages in thread
From: Mike Turquette @ 2014-09-02 23:52 UTC (permalink / raw)
To: Stephen Boyd
Cc: linux-arm-msm, Andy Gross, linux-kernel, linux-arm-kernel,
Kumar Gala
Quoting Stephen Boyd (2014-09-02 15:01:15)
> On 09/02/14 14:44, Mike Turquette wrote:
> > Quoting Stephen Boyd (2014-08-29 12:49:26)
> >> The pre-divider for the sdc clocks only has 2 bits in it, so we
> >> can't possibly divide by anything larger than 4 here.
> >> Furthermore, we program the value of ~(n - m) and the n value is
> >> larger than 8 bits (max of 256). Replace this entry with 200kHz
> >> which is close enough to 144kHz to be usable.
> >>
> >> Cc: Kumar Gala <galak@codeaurora.org>
> >> Cc: Andy Gross <agross@codeaurora.org>
> >> Fixes: 24d8fba44af3 "clk: qcom: Add support for IPQ8064's global clock controller (GCC)"
> >> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
> > Do you need this pulled into a 3.17-rc?
> >
>
> Yes that would be helpful since this fixes a driver introduced into 3.17.
Applied to clk-fixes.
Thanks,
Mike
>
> --
> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
> hosted by The Linux Foundation
>
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2014-09-02 23:52 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2014-08-29 19:49 [PATCH] clk: qcom: Fix sdc 144kHz frequency entry Stephen Boyd
2014-09-02 21:44 ` Mike Turquette
2014-09-02 22:01 ` Stephen Boyd
2014-09-02 23:52 ` Mike Turquette
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).