From: Stanimir Varbanov <svarbanov@mm-sol.com>
To: Archit Taneja <architt@codeaurora.org>
Cc: vinod.koul@intel.com, agross@codeaurora.org,
dmaengine@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] dmaengine: qcom_bam_dma: Add support for BAM v1.7.0
Date: Fri, 20 Feb 2015 13:57:29 +0200 [thread overview]
Message-ID: <54E72129.30902@mm-sol.com> (raw)
In-Reply-To: <1421910266-8573-1-git-send-email-architt@codeaurora.org>
On 01/22/2015 09:04 AM, Archit Taneja wrote:
> Add register offset table entry for the newer (v1.7.0) version of the BAM IP
> found on MSM8916. Update the DT bindings documentation.
>
> Signed-off-by: Archit Taneja <architt@codeaurora.org>
> ---
> .../devicetree/bindings/dma/qcom_bam_dma.txt | 1 +
> drivers/dma/qcom_bam_dma.c | 30 ++++++++++++++++++++++
> 2 files changed, 31 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/dma/qcom_bam_dma.txt b/Documentation/devicetree/bindings/dma/qcom_bam_dma.txt
> index f8c3311..1c9d48e 100644
> --- a/Documentation/devicetree/bindings/dma/qcom_bam_dma.txt
> +++ b/Documentation/devicetree/bindings/dma/qcom_bam_dma.txt
> @@ -4,6 +4,7 @@ Required properties:
> - compatible: must be one of the following:
> * "qcom,bam-v1.4.0" for MSM8974, APQ8074 and APQ8084
> * "qcom,bam-v1.3.0" for APQ8064, IPQ8064 and MSM8960
> + * "qcom,bam-v1.7.0" for MSM8916
> - reg: Address range for DMA registers
> - interrupts: Should contain the one interrupt shared by all channels
> - #dma-cells: must be <1>, the cell in the dmas property of the client device
> diff --git a/drivers/dma/qcom_bam_dma.c b/drivers/dma/qcom_bam_dma.c
> index 3122a99..447ad12 100644
> --- a/drivers/dma/qcom_bam_dma.c
> +++ b/drivers/dma/qcom_bam_dma.c
> @@ -171,6 +171,35 @@ static const struct reg_offset_data bam_v1_4_reg_info[] = {
> [BAM_P_FIFO_SIZES] = { 0x1820, 0x00, 0x1000, 0x00 },
> };
>
> +static const struct reg_offset_data bam_v1_7_reg_info[] = {
> + [BAM_CTRL] = { 0x00000, 0x00, 0x00, 0x00 },
> + [BAM_REVISION] = { 0x01000, 0x00, 0x00, 0x00 },
> + [BAM_NUM_PIPES] = { 0x01008, 0x00, 0x00, 0x00 },
> + [BAM_DESC_CNT_TRSHLD] = { 0x00008, 0x00, 0x00, 0x00 },
> + [BAM_IRQ_SRCS] = { 0x03010, 0x00, 0x00, 0x00 },
> + [BAM_IRQ_SRCS_MSK] = { 0x03014, 0x00, 0x00, 0x00 },
> + [BAM_IRQ_SRCS_UNMASKED] = { 0x03018, 0x00, 0x00, 0x00 },
> + [BAM_IRQ_STTS] = { 0x00014, 0x00, 0x00, 0x00 },
> + [BAM_IRQ_CLR] = { 0x00018, 0x00, 0x00, 0x00 },
> + [BAM_IRQ_EN] = { 0x0001C, 0x00, 0x00, 0x00 },
> + [BAM_CNFG_BITS] = { 0x0007C, 0x00, 0x00, 0x00 },
> + [BAM_IRQ_SRCS_EE] = { 0x03000, 0x00, 0x00, 0x80 },
> + [BAM_IRQ_SRCS_MSK_EE] = { 0x03004, 0x00, 0x00, 0x80 },
huh, 0x80 should be 0x1000 ?
> + [BAM_P_CTRL] = { 0x13000, 0x1000, 0x00, 0x00 },
> + [BAM_P_RST] = { 0x13004, 0x1000, 0x00, 0x00 },
> + [BAM_P_HALT] = { 0x13008, 0x1000, 0x00, 0x00 },
> + [BAM_P_IRQ_STTS] = { 0x13010, 0x1000, 0x00, 0x00 },
> + [BAM_P_IRQ_CLR] = { 0x13014, 0x1000, 0x00, 0x00 },
> + [BAM_P_IRQ_EN] = { 0x13018, 0x1000, 0x00, 0x00 },
> + [BAM_P_EVNT_DEST_ADDR] = { 0x1382C, 0x00, 0x1000, 0x00 },
> + [BAM_P_EVNT_REG] = { 0x13818, 0x00, 0x1000, 0x00 },
> + [BAM_P_SW_OFSTS] = { 0x13800, 0x00, 0x1000, 0x00 },
> + [BAM_P_DATA_FIFO_ADDR] = { 0x13824, 0x00, 0x1000, 0x00 },
> + [BAM_P_DESC_FIFO_ADDR] = { 0x1381C, 0x00, 0x1000, 0x00 },
> + [BAM_P_EVNT_GEN_TRSHLD] = { 0x13828, 0x00, 0x1000, 0x00 },
> + [BAM_P_FIFO_SIZES] = { 0x13820, 0x00, 0x1000, 0x00 },
> +};
<snip>
--
regards,
Stan
next prev parent reply other threads:[~2015-02-20 11:57 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-22 7:04 [PATCH] dmaengine: qcom_bam_dma: Add support for BAM v1.7.0 Archit Taneja
2015-01-22 21:48 ` Andy Gross
2015-02-10 5:50 ` Stanimir Varbanov
2015-02-20 11:57 ` Stanimir Varbanov [this message]
2015-02-20 22:28 ` Andy Gross
2015-02-23 4:10 ` [PATCH v2] " Archit Taneja
2015-03-06 14:33 ` Ivan T. Ivanov
2015-03-16 16:52 ` Vinod Koul
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