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From: Stephen Boyd <sboyd@codeaurora.org>
To: Archit Taneja <architt@codeaurora.org>
Cc: dehrenberg@google.com, linux-arm-msm@vger.kernel.org,
	cernekee@gmail.com, linux-kernel@vger.kernel.org,
	linux-mtd@lists.infradead.org, agross@codeaurora.org,
	computersforpeace@gmail.com
Subject: Re: [PATCH v2 2/5] mtd: nand: Qualcomm NAND controller driver
Date: Tue, 28 Jul 2015 18:48:46 -0700	[thread overview]
Message-ID: <55B830FE.2020601@codeaurora.org> (raw)
In-Reply-To: <55B7063F.9090102@codeaurora.org>

On 07/27/2015 09:34 PM, Archit Taneja wrote:
> Hi,
>
> On 07/25/2015 06:21 AM, Stephen Boyd wrote:
>> On 07/21/2015 03:34 AM, Archit Taneja wrote:
>>
>>> +              int size)
>>> +{
>>> +    struct desc_info *desc;
>>> +    struct dma_async_tx_descriptor *dma_desc;
>>> +    struct scatterlist *sgl;
>>> +    int r;
>>> +
>>> +    desc = kzalloc(sizeof(*desc), GFP_KERNEL);
>>> +    if (!desc)
>>> +        return -ENOMEM;
>>> +
>>> +    list_add_tail(&desc->list, &this->list);
>>> +
>>> +    sgl = &desc->sgl;
>>> +
>>> +    sg_init_one(sgl, vaddr, size);
>>> +
>>> +    desc->dir = DMA_MEM_TO_DEV;
>>> +
>>> +    r = dma_map_sg(this->dev, sgl, 1, desc->dir);
>>> +    if (r == 0)
>>> +        goto err;
>>
>> Should we return an error in this case? Looks like return 0.
>
> dma_map_sg returns the number of sg entries successfully mapped. In
> this case, it should be 1.

Right, but this function returns 0 (success?) if we failed to map anything.

>
>>
>>> +
>>> +    this->slave_conf.device_fc = 0;
>>> +    this->slave_conf.dst_addr = this->res->start + reg_off;
>>> +    this->slave_conf.dst_maxburst = 16;
>>
>> Is there any reason why slave_conf can't be on the stack? Otherwise it's
>> odd that it's overwritten a few times before we submit the descriptors,
>> so it must be copied by the dmaengine provider, but that isn't clear at
>> all from the code. If it isn't copied, perhaps it should be part of the
>> desc_info structure. If it is copied I wonder why it isn't const in the
>> function signature.
>
> The dmaengine drivers either memcpy slave_config in their
> device_config() dmaengine op, or populate their local members reading
> params in the passed slave_config.
>
> I'll move slave_conf to stack. As you said, the config argument
> in dmaengine_slave_config should ideally use const.

Cool, someone should send a patch.

>
>>
>>> +
>>> +    r = dmaengine_slave_config(this->chan, &this->slave_conf);
>>> +    if (r) {
>>> +        dev_err(this->dev, "failed to configure dma channel\n");
>>> +        goto err;
>>> +    }
>>> +
>>> +    dma_desc = dmaengine_prep_slave_sg(this->chan, sgl, 1, 
>>> desc->dir, 0);
>>> +    if (!dma_desc) {
>>> +        dev_err(this->dev, "failed to prepare data write desc\n");
>>> +        r = PTR_ERR(dma_desc);
>>> +        goto err;
>>> +    }
>>> +
>>> +    desc->dma_desc = dma_desc;
>>> +
>>> +    return 0;
>>> +err:
>>> +    kfree(desc);
>>> +
>>> +    return r;
>>> +}
>>> +
>>> +/*
>>> + * helper to prepare dma descriptors to configure registers needed 
>>> for reading a
>>> + * codeword/step in a page
>>> + */
>>> +static void config_cw_read(struct qcom_nandc_data *this)
>>> +{
>>> +    struct nandc_regs *regs = this->regs;
>>> +
>>> +    write_reg_dma(this, NAND_FLASH_CMD, &regs->cmd, 3, true);
>>
>> Maybe it would be better to have a case statement inside
>> {write,read}_reg_dma() that looked at the second argument and matched it
>> up with an offset in regs. Then this could be
>>
>>      write_reg_dma(this, NAND_FLASH_CMD, 3, true);
>
> That's a good idea. However, we have at least one programming seqeunce 
> (in nandc_param) where we need to write two different values to the 
> same register. In such a case, we need two different locations to 
> store the two values.
>
> I can split up the programming sequence into two parts such that we 
> won't write to the same register twice. But doing this for the sake of 
> reducing an argument to write_reg_dma seems a bit unnecessary.
>

Or you could have two #defines that indicate the different usage? Like 
NAND_CMD_FOO and NAND_CMD_BAR that both map to the same register but 
uses different locations as storage.

>>
>> Are we guaranteed that this is called within the same context as where
>> the buffer is passed to this function? Otherwise this stack check isn't
>> going to work because object_is_on_stack() will silently fail.
>
> These are funcs are finally tied to mtd ops. I think in normal operation
> it'll be the same context. I'll still cross check. The aim of the check
> is to prevent a memcpy of the buffer to/from the layer above. A false
> negative will result in a slower read/write operation.

Right. It would be nice if the mtd layer was DMA aware and could 
indicate to drivers that DMA on the buffer is allowable or not. Trying 
to figure it out if the buffer is in lowmem after the buffer is mapped 
is error prone, which is why not a lot of usage of object_is_on_stack() 
exists. Honestly I'm confused, I thought the DMA APIs would "do the 
right thing" when highmem was passed into the mapping APIs, but maybe 
I'm wrong. I'll have to look.

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

  reply	other threads:[~2015-07-29  1:48 UTC|newest]

Thread overview: 127+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-01-16 14:48 [PATCH 0/5] mtd: Qualcomm NAND controller driver Archit Taneja
2015-01-16 14:48 ` [PATCH 1/5] clk: qcom: Add EBI2 clocks for IPQ806x Archit Taneja
2015-01-16 21:56   ` Stephen Boyd
2015-01-19 10:32     ` Archit Taneja
2015-01-29 22:21   ` Stephen Boyd
2015-01-16 14:48 ` [PATCH 2/5] mtd: nand: Add qcom nand controller driver Archit Taneja
2015-01-21  0:54   ` Daniel Ehrenberg
2015-01-22  6:36     ` Archit Taneja
2015-01-26 21:05       ` Kevin Cernekee
2015-01-27  3:56         ` Archit Taneja
     [not found] ` <1421419702-17812-1-git-send-email-architt-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2015-01-16 14:48   ` [PATCH 3/5] Documentaion: dt: add DT bindings for Qualcomm NAND controller Archit Taneja
2015-01-16 14:48 ` [PATCH 4/5] arm: qcom: dts: Add NAND controller node for ipq806x Archit Taneja
2015-01-16 14:48 ` [PATCH 5/5] arm: qcom: dts: Enale NAND node on IPQ8064 AP148 pplatform Archit Taneja
2015-02-18  6:03 ` [PATCH 0/5] mtd: Qualcomm NAND controller driver Archit Taneja
2015-07-21 10:34 ` [PATCH v2 " Archit Taneja
2015-07-21 10:34   ` [PATCH v2 1/5] mtd: nand: Create a BBT flag to access bad block markers in raw mode Archit Taneja
2015-07-24 19:01     ` Andy Gross
2015-07-21 10:34   ` [PATCH v2 2/5] mtd: nand: Qualcomm NAND controller driver Archit Taneja
2015-07-24 19:39     ` Andy Gross
2015-07-25  0:51     ` Stephen Boyd
2015-07-28  4:34       ` Archit Taneja
2015-07-29  1:48         ` Stephen Boyd [this message]
2015-07-29  5:14           ` Archit Taneja
2015-07-29 18:33             ` Stephen Boyd
2015-07-30  6:53               ` Archit Taneja
2015-07-21 10:34   ` [PATCH v2 3/5] dt/bindings: qcom_nandc: Add DT bindings Archit Taneja
2015-07-24 18:57     ` Andy Gross
2015-07-24 19:37     ` Stephen Boyd
2015-07-21 10:34   ` [PATCH v2 4/5] arm: qcom: dts: Add NAND controller node for ipq806x Archit Taneja
2015-07-24 19:01     ` Andy Gross
2015-07-21 10:34   ` [PATCH v2 5/5] arm: qcom: dts: Enale NAND node on IPQ8064 AP148 platform Archit Taneja
2015-07-24 18:58     ` Andy Gross
2015-07-24 18:59     ` Andy Gross
2015-08-03  5:08 ` [PATCH v3 0/5] mtd: Qualcomm NAND controller driver Archit Taneja
2015-08-03  5:08   ` [PATCH v3 1/5] mtd: nand: Create a BBT flag to access bad block markers in raw mode Archit Taneja
2015-08-03  5:08   ` [PATCH v3 2/5] mtd: nand: Qualcomm NAND controller driver Archit Taneja
2015-08-03 23:38     ` Stephen Boyd
2015-08-04 15:04       ` Archit Taneja
2015-08-04 17:53         ` Stephen Boyd
2015-08-03  5:08   ` [PATCH v3 3/5] dt/bindings: qcom_nandc: Add DT bindings Archit Taneja
2015-08-03  5:08   ` [PATCH v3 4/5] arm: qcom: dts: Add NAND controller node for ipq806x Archit Taneja
     [not found]   ` <1438578498-32254-1-git-send-email-architt-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2015-08-03  5:08     ` [PATCH v3 5/5] arm: qcom: dts: Enable NAND node on IPQ8064 AP148 platform Archit Taneja
2015-08-03 19:35       ` Andy Gross
2015-08-04 15:05         ` Archit Taneja
2015-08-03 20:58       ` Stephen Boyd
2015-08-04 15:06         ` Archit Taneja
2015-08-19  4:49   ` [PATCH v4 0/5] mtd: Qualcomm NAND controller driver Archit Taneja
2015-08-19  4:49     ` [PATCH v4 1/5] mtd: nand: Create a BBT flag to access bad block markers in raw mode Archit Taneja
2015-10-02  2:44       ` Brian Norris
2015-10-02  6:27         ` Boris Brezillon
2015-10-11 20:03           ` Brian Norris
2015-11-10  5:13             ` Archit Taneja
2015-08-19  4:49     ` [PATCH v4 2/5] mtd: nand: Qualcomm NAND controller driver Archit Taneja
2015-08-26 23:37       ` Stephen Boyd
2015-09-13 13:42         ` Archit Taneja
2015-10-02  3:05       ` Brian Norris
2015-10-05  6:51         ` Archit Taneja
2015-10-06  9:17           ` Brian Norris
2015-10-07  4:11             ` Archit Taneja
2015-10-02 17:31       ` Brian Norris
2015-12-16  9:15       ` Boris Brezillon
2015-12-16 11:57         ` Archit Taneja
2015-12-16 14:18           ` Boris Brezillon
2015-12-17  9:48             ` Archit Taneja
2015-12-18 18:48               ` Boris Brezillon
2015-12-16 19:16           ` Brian Norris
2015-08-19  4:49     ` [PATCH v4 3/5] dt/bindings: qcom_nandc: Add DT bindings Archit Taneja
2015-12-16  6:33       ` Boris Brezillon
2015-12-16  8:11         ` Archit Taneja
2015-08-19  4:49     ` [PATCH v4 4/5] arm: qcom: dts: Add NAND controller node for ipq806x Archit Taneja
2015-08-19  4:49     ` [PATCH v4 5/5] arm: qcom: dts: Enable NAND node on IPQ8064 AP148 platform Archit Taneja
2016-01-05  5:24     ` [PATCH v5 0/3] mtd: Qualcomm NAND controller driver Archit Taneja
2016-01-05  5:24       ` [PATCH v5 1/3] mtd: nand: don't select chip in nand_chip's block_bad op Archit Taneja
2016-01-06 16:05         ` Boris Brezillon
2016-01-07  4:27           ` Archit Taneja
2016-01-05  5:25       ` [PATCH v5 2/3] mtd: nand: Qualcomm NAND controller driver Archit Taneja
2016-01-06 17:05         ` Boris Brezillon
2016-01-08  6:33           ` Archit Taneja
2016-01-08  8:01             ` Boris Brezillon
2016-01-08 10:23               ` Archit Taneja
2016-01-08 10:31                 ` Boris Brezillon
2016-01-08 10:42                   ` Archit Taneja
2016-01-05  5:25       ` [PATCH v5 3/3] dt/bindings: qcom_nandc: Add DT bindings Archit Taneja
2016-01-06 15:05         ` Boris Brezillon
2016-01-06 15:14         ` Rob Herring
2016-01-06 15:37           ` Boris Brezillon
2016-01-06 16:13             ` Rob Herring
2016-01-06 16:36               ` Boris Brezillon
2016-01-18  9:50       ` [PATCH v6 0/3] mtd: Qualcomm NAND controller driver Archit Taneja
2016-01-18  9:50         ` [PATCH v6 1/3] mtd: nand: don't select chip in nand_chip's block_bad op Archit Taneja
2016-01-18 10:29           ` Boris Brezillon
2016-01-18 10:47             ` Archit Taneja
2016-01-18  9:50         ` [PATCH v6 2/3] mtd: nand: Qualcomm NAND controller driver Archit Taneja
2016-01-18 11:01           ` Boris Brezillon
2016-01-18 11:14             ` Archit Taneja
2016-01-18  9:50         ` [PATCH v6 3/3] dt/bindings: qcom_nandc: Add DT bindings Archit Taneja
2016-01-20 14:46           ` Rob Herring
2016-01-21  7:13         ` [PATCH v7 0/3] mtd: Qualcomm NAND controller driver Archit Taneja
2016-01-21  7:13           ` [PATCH v7 1/3] mtd: nand: don't select chip in nand_chip's block_bad op Archit Taneja
2016-01-21  8:33             ` Boris Brezillon
2016-01-21  7:13           ` [PATCH v7 2/3] mtd: nand: Qualcomm NAND controller driver Archit Taneja
2016-01-21  8:51             ` Boris Brezillon
2016-01-21  9:52               ` Archit Taneja
2016-01-21 10:13                 ` Boris Brezillon
2016-01-21 11:00                   ` Archit Taneja
2016-01-21 12:36                     ` Boris Brezillon
2016-01-21 13:08                       ` Archit Taneja
2016-01-21 13:25                         ` Boris Brezillon
2016-01-25  7:43                           ` Archit Taneja
2016-01-21  7:13           ` [PATCH v7 3/3] dt/bindings: qcom_nandc: Add DT bindings Archit Taneja
2016-01-21  7:23             ` Archit Taneja
2016-02-03  8:59           ` [PATCH v8 0/3] mtd: Qualcomm NAND controller driver Archit Taneja
2016-02-03  8:59             ` [PATCH v8 1/3] mtd: nand: don't select chip in nand_chip's block_bad op Archit Taneja
2016-02-03  8:59             ` [PATCH v8 2/3] mtd: nand: Qualcomm NAND controller driver Archit Taneja
2016-02-04 10:39               ` Boris Brezillon
2016-02-04 16:13                 ` Archit Taneja
2016-02-16  6:50                 ` Archit Taneja
2016-03-08 10:13                   ` Archit Taneja
2016-03-18 15:49               ` Boris Brezillon
2016-03-18 16:48                 ` Boris Brezillon
2016-03-19 10:14                   ` Archit Taneja
2016-03-19 10:34                     ` Boris Brezillon
2016-03-22 13:10                       ` Archit Taneja
2016-03-22 14:05                         ` Boris Brezillon
2016-02-03  8:59             ` [PATCH v8 3/3] dt/bindings: qcom_nandc: Add DT bindings Archit Taneja
2016-03-10 19:47             ` [PATCH v8 0/3] mtd: Qualcomm NAND controller driver Brian Norris
2016-03-16  5:43               ` Archit Taneja

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