Linux ARM-MSM sub-architecture
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From: Krzysztof Kozlowski <krzk@kernel.org>
To: Ayushi Makhija <quic_amakhija@quicinc.com>
Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
	freedreno@lists.freedesktop.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, robdclark@gmail.com,
	dmitry.baryshkov@oss.qualcomm.com, sean@poorly.run,
	marijn.suijten@somainline.org, andersson@kernel.org,
	robh@kernel.org, robh+dt@kernel.org, krzk+dt@kernel.org,
	konradybcio@kernel.org, conor+dt@kernel.org,
	andrzej.hajda@intel.com, neil.armstrong@linaro.org,
	rfoss@kernel.org, Laurent.pinchart@ideasonboard.com,
	jonathan@marek.ca, jonas@kwiboo.se, jernej.skrabec@gmail.com,
	quic_rajeevny@quicinc.com, quic_vproddut@quicinc.com
Subject: Re: [PATCH v4 1/5] dt-bindings: display: msm-dsi-phy-7nm: document the QCS8300 DSI PHY
Date: Sat, 3 Jan 2026 13:40:37 +0100	[thread overview]
Message-ID: <5682eae1-c55b-462a-97d1-9a10eb694062@kernel.org> (raw)
In-Reply-To: <58b496b5-2847-4af7-8a34-e227e4324deb@quicinc.com>

On 02/01/2026 10:29, Ayushi Makhija wrote:
> On 12/27/2025 4:43 PM, Krzysztof Kozlowski wrote:
>> On Thu, Dec 25, 2025 at 08:51:30PM +0530, Ayushi Makhija wrote:
>>> The QCS8300 MDSS DSI PHY is the same 5nm PHY IP as on SA8775P, with
>>> identical register layout and programming model. Model this by using
>>> a QCS8300 specific compatible with a qcom,sa8775p-dsi-phy-5nm fallback,
>>> and update the schema to require this two entry form for QCS8300 while
>>> keeping existing single compatible users valid.
>>
>> Last sentence is redundant. I asked to explain the hardware, not to tell
>> us how Devicetree works. Write concise and informative commit msgs which
>> tell non-obvious things. Not what you did. I alreaded asked this - do
>> not state the obvious, do not copy the subject.
>>
>> The only useful part of your commit msg is first sentence - two lines,
>> so 33%. Remaining four lines, so 66%, is obvious.
>>
>> Best regards,
>> Krzysztof
>>
> 
> Hi Krzysztof,
> 
> Can you please check below commit description is it appropriate  ?
> 
> QCS8300 uses the same 5nm MDSS DSI PHY IP as SA8775P, sharing an identical
> register layout and programming model. Introduce a QCS8300-specific compatible
> with a fallback to `qcom,sa8775p-dsi-phy-5nm` to reflect this hardware reuse.
> 

Yes, that's very good.

Best regards,
Krzysztof

  reply	other threads:[~2026-01-03 12:40 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-25 15:21 [PATCH v4 0/5] Add DSI display support for QCS8300 target Ayushi Makhija
2025-12-25 15:21 ` [PATCH v4 1/5] dt-bindings: display: msm-dsi-phy-7nm: document the QCS8300 DSI PHY Ayushi Makhija
2025-12-27 11:13   ` Krzysztof Kozlowski
2025-12-31  6:36     ` Ayushi Makhija
2026-01-02  9:29     ` Ayushi Makhija
2026-01-03 12:40       ` Krzysztof Kozlowski [this message]
2025-12-27 12:19   ` Krzysztof Kozlowski
2025-12-25 15:21 ` [PATCH v4 2/5] dt-bindings: msm: dsi-controller-main: document the QCS8300 DSI CTRL Ayushi Makhija
2025-12-25 15:21 ` [PATCH v4 3/5] dt-bindings: display: msm: document DSI controller and phy on QCS8300 Ayushi Makhija
2025-12-27 11:14   ` Krzysztof Kozlowski
2025-12-31  6:33     ` Ayushi Makhija
2025-12-25 15:21 ` [PATCH v4 4/5] arm64: dts: qcom: qcs8300: add Display Serial Interface device nodes Ayushi Makhija
2025-12-25 15:21 ` [PATCH v4 5/5] arm64: dts: qcom: qcs8300-ride: add anx7625 DSI to DP bridge node Ayushi Makhija

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