From mboxrd@z Thu Jan 1 00:00:00 1970 From: Archit Taneja Subject: Re: [PATCH] clk: qcom: Fix pre-divider usage for pixel RCG Date: Sun, 28 Feb 2016 15:12:17 +0530 Message-ID: <56D2C0F9.4010509@codeaurora.org> References: <1456464655-3684-1-git-send-email-architt@codeaurora.org> <20160226174434.GS28849@codeaurora.org> Mime-Version: 1.0 Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Return-path: Received: from smtp.codeaurora.org ([198.145.29.96]:53705 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752717AbcB1JmY (ORCPT ); Sun, 28 Feb 2016 04:42:24 -0500 In-Reply-To: <20160226174434.GS28849@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org List-Id: linux-arm-msm@vger.kernel.org To: Stephen Boyd Cc: linux-arm-msm@vger.kernel.org, John Stultz , Vinay Simha On 2/26/2016 11:14 PM, Stephen Boyd wrote: > On 02/26, Archit Taneja wrote: >> diff --git a/drivers/clk/qcom/clk-rcg.c b/drivers/clk/qcom/clk-rcg.c >> index bfbb28f..2c033f2 100644 >> --- a/drivers/clk/qcom/clk-rcg.c >> +++ b/drivers/clk/qcom/clk-rcg.c >> @@ -655,8 +654,13 @@ static int clk_rcg_pixel_set_rate(struct clk_hw *hw, unsigned long rate, >> (parent_rate > (request + delta))) >> continue; >> >> - f.m = frac->num; >> - f.n = frac->den; >> + /* try to use only the pre-divider if we can */ >> + if (frac->num == 1) { >> + f.pre_div = frac->den; > > What if the pre divider can't support the frac->den value? Maybe > we should just force the pre divider to be in bypass so that we > can use the m/n all the time. Yeah, for some strange reason it seems like having a pre-divider as 3 itself doesn't seem to work. As you suggested, I'll force the pre divider to 1 and use m/n all the time. Archit > >> + } else { >> + f.m = frac->num; >> + f.n = frac->den; >> + } >> >> return __clk_rcg_set_rate(rcg, &f); >> } > -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project