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Tue, 26 Nov 2024 04:04:20 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 4AQ44J6a003865 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 26 Nov 2024 04:04:19 GMT Received: from [10.217.217.81] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 25 Nov 2024 20:04:15 -0800 Message-ID: <5be1ca54-6a9c-46da-81cc-882ae1596cae@quicinc.com> Date: Tue, 26 Nov 2024 09:34:12 +0530 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/2] clk: qcom: videocc: Use HW_CTRL_TRIGGER flag for video GDSC's To: Dmitry Baryshkov CC: Renjiang Han , Bjorn Andersson , Michael Turquette , "Stephen Boyd" , Stanimir Varbanov , Vikash Garodia , Bryan O'Donoghue , Mauro Carvalho Chehab , , , , References: <20241122-switch_gdsc_mode-v1-0-365f097ecbb0@quicinc.com> <20241122-switch_gdsc_mode-v1-1-365f097ecbb0@quicinc.com> <1d9aa2e7-d402-42dc-baa6-155f01b132ca@quicinc.com> <23ho25gl3iwyi2jspb6a2x5bv76fco5pkg2x5ct4gu3c44dbiq@yec6evx5sihm> Content-Language: en-US From: Taniya Das In-Reply-To: <23ho25gl3iwyi2jspb6a2x5bv76fco5pkg2x5ct4gu3c44dbiq@yec6evx5sihm> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: kURCGXSHlK3U5zGc2xV4geoA003bOF5h X-Proofpoint-ORIG-GUID: kURCGXSHlK3U5zGc2xV4geoA003bOF5h X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 spamscore=0 mlxlogscore=999 clxscore=1015 mlxscore=0 adultscore=0 lowpriorityscore=0 impostorscore=0 suspectscore=0 malwarescore=0 bulkscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2411260031 On 11/23/2024 5:35 AM, Dmitry Baryshkov wrote: > On Fri, Nov 22, 2024 at 10:25:44PM +0530, Taniya Das wrote: >> >> >> On 11/22/2024 4:29 PM, Dmitry Baryshkov wrote: >>> On Fri, Nov 22, 2024 at 04:01:45PM +0530, Renjiang Han wrote: >>>> From: Taniya Das >>>> >>>> The video driver will be using the newly introduced >>> >>> 'will be' or 'is using'? Or will be using it for these platforms? Is >>> there any kind of dependency between two patches in the series? >>> >> The video driver will not be able to work without the clock side changes. > > Will enabling this flag break the video driver until it is updated? > Yes, my understanding is yes it will break. When we first introduced the flag we had got the driver and the clock changes together. >> >>>> dev_pm_genpd_set_hwmode() API to switch the video GDSC to HW and SW >>>> control modes at runtime. >>>> Hence use HW_CTRL_TRIGGER flag instead of HW_CTRL for video GDSC's for >>>> Qualcomm SoC SC7180 and SDM845. >>> >>> Is it applicable to any other platforms? Why did you select just these >>> two? >>> >> >> The V6 version of Video driver is already using them, now the video driver >> wants to migrate to v4 version of the HW to use the new flag. > > I mean slightly different issue. We have following drivers: > > videocc-sa8775p.c - already uses HW_CTRL_TRIGGER > videocc-sc7180.c - being converted now > videocc-sc7280.c - already uses HW_CTRL_TRIGGER > videocc-sdm845.c - being converted now > videocc-sm7150.c > videocc-sm8150.c > videocc-sm8250.c - already uses HW_CTRL_TRIGGER > videocc-sm8350.c - already uses HW_CTRL_TRIGGER > videocc-sm8450.c > videocc-sm8550.c - already uses HW_CTRL_TRIGGER > > This leaves sm7150, sm8150 and sm8450 untouched. Don't they also need to > use HW_CTRL_TRIGGER? > Yes, I am okay to add the flag, but looking for the Video SW team to confirm they are well tested on the rest of the platforms. >> >>>> >>>> Signed-off-by: Taniya Das >>>> Signed-off-by: Renjiang Han >>>> --- >>>> drivers/clk/qcom/videocc-sc7180.c | 2 +- >>>> drivers/clk/qcom/videocc-sdm845.c | 4 ++-- >>>> 2 files changed, 3 insertions(+), 3 deletions(-) >>>> >>>> diff --git a/drivers/clk/qcom/videocc-sc7180.c b/drivers/clk/qcom/videocc-sc7180.c >>>> index d7f84548039699ce6fdd7c0f6675c168d5eaf4c1..dd2441d6aa83bd7cff17deeb42f5d011c1e9b134 100644 >>>> --- a/drivers/clk/qcom/videocc-sc7180.c >>>> +++ b/drivers/clk/qcom/videocc-sc7180.c >>>> @@ -166,7 +166,7 @@ static struct gdsc vcodec0_gdsc = { >>>> .pd = { >>>> .name = "vcodec0_gdsc", >>>> }, >>>> - .flags = HW_CTRL, >>>> + .flags = HW_CTRL_TRIGGER, >>>> .pwrsts = PWRSTS_OFF_ON, >>>> }; >>>> diff --git a/drivers/clk/qcom/videocc-sdm845.c b/drivers/clk/qcom/videocc-sdm845.c >>>> index f77a0777947773dc8902c92098acff71b9b8f10f..6dedc80a8b3e18eca82c08a5bcd7e1fdc374d4b5 100644 >>>> --- a/drivers/clk/qcom/videocc-sdm845.c >>>> +++ b/drivers/clk/qcom/videocc-sdm845.c >>>> @@ -260,7 +260,7 @@ static struct gdsc vcodec0_gdsc = { >>>> }, >>>> .cxcs = (unsigned int []){ 0x890, 0x930 }, >>>> .cxc_count = 2, >>>> - .flags = HW_CTRL | POLL_CFG_GDSCR, >>>> + .flags = HW_CTRL_TRIGGER | POLL_CFG_GDSCR, >>>> .pwrsts = PWRSTS_OFF_ON, >>>> }; >>>> @@ -271,7 +271,7 @@ static struct gdsc vcodec1_gdsc = { >>>> }, >>>> .cxcs = (unsigned int []){ 0x8d0, 0x950 }, >>>> .cxc_count = 2, >>>> - .flags = HW_CTRL | POLL_CFG_GDSCR, >>>> + .flags = HW_CTRL_TRIGGER | POLL_CFG_GDSCR, >>>> .pwrsts = PWRSTS_OFF_ON, >>>> }; >>>> >>>> -- >>>> 2.34.1 >>>> >>> >> >> -- >> Thanks & Regards, >> Taniya Das. > -- Thanks & Regards, Taniya Das.