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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b9084e9fd46sm511111466b.53.2026.02.25.03.47.48 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 25 Feb 2026 03:47:50 -0800 (PST) Message-ID: <5da495ce-9114-49da-82a2-0d9082a3e506@oss.qualcomm.com> Date: Wed, 25 Feb 2026 12:47:47 +0100 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/4] arm64: dts: qcom: pm7250b: Enable Qualcomm BCL device To: Manaf Meethalavalappu Pallikunhi , Guenter Roeck , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , amit.kucheria@oss.qualcomm.com, Daniel Lezcano , Gaurav Kohli , Kamal Wadhwa , Sebastian Reichel Cc: linux-hwmon@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260206-qcom-bcl-hwmon-v1-0-7b426f0b77a1@oss.qualcomm.com> <20260206-qcom-bcl-hwmon-v1-3-7b426f0b77a1@oss.qualcomm.com> <98ad13d8-82d0-4def-917d-b99cf455c5f1@oss.qualcomm.com> <91425550-35f6-4941-917c-f639dfadb42d@oss.qualcomm.com> <81d31750-f301-4332-84fa-a5c1aa401507@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-ORIG-GUID: TJqoy1m48uCnq3N1OP-KWdWFUIk09-FU X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMjI1MDExNSBTYWx0ZWRfX38ksywMZRTK3 Fpw+fDkVvt/rxS0Juo4PqpOUZZhumyHzIyzG5cLPMBBH0pYa7RtdZ2oli/zLFxdR4YCWDyvxOWl kIFubj4fgViPol7UllQZc7o5HPMsECcTF1SkemBXIOwIwHJw6OWYfiH9chJrLs6ezW5j0lIOfGJ R6EpuDXI6gQIKpSpMHvWdoXZX4aVpLEWzTRwTsKw+z90LkPYsC6KDDyZgTNLQ5gu12vTRpAtnAx dSNHdPDIzr1HY9mvZpQJBWV6V7kRSwKc72IKSd4KjxdvpWQjtgo5IoYb2yfka++hjYBjTdFGgq+ nQZ6e6ia+miKsZHrA84RKtu2VJlF+ZRlPWvBU6El5yn/RZ6yPnJzpUrq2gvA9YuDd1DbOKrEAki R6F2ViGPcHhA34GEPp93H+ADbeu/0FlvyVwysTKMfyzGAT8xmcAKNWxrVD4R7dF88O7qygujcEy xzOUJTJ0qex/ifx9xZw== X-Authority-Analysis: v=2.4 cv=GZwaXAXL c=1 sm=1 tr=0 ts=699ee169 cx=c_pps a=50t2pK5VMbmlHzFWWp8p/g==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=HzLeVaNsDn8A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22 a=EUspDBNiAAAA:8 a=lfvPHyuYFvH2aD9VkFsA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=IoWCM6iH3mJn3m4BftBB:22 X-Proofpoint-GUID: TJqoy1m48uCnq3N1OP-KWdWFUIk09-FU X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-02-24_03,2026-02-23_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 priorityscore=1501 bulkscore=0 impostorscore=0 lowpriorityscore=0 malwarescore=0 phishscore=0 suspectscore=0 adultscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2602130000 definitions=main-2602250115 On 2/24/26 7:35 PM, Manaf Meethalavalappu Pallikunhi wrote: > Hi Konrad, > > On 2/19/2026 6:34 PM, Konrad Dybcio wrote: >> On 2/19/26 12:34 PM, Manaf Meethalavalappu Pallikunhi wrote: >>> Hi Konrad, >>> >>> On 2/16/2026 5:18 PM, Konrad Dybcio wrote: >>>> On 2/13/26 12:55 PM, Manaf Meethalavalappu Pallikunhi wrote: >>>>> Hi Konrad, >>>>> >>>>> On 2/6/2026 2:41 PM, Konrad Dybcio wrote: >>>>>> On 2/5/26 10:14 PM, Manaf Meethalavalappu Pallikunhi wrote: >>>>>>> Enable Qualcomm BCL hardware devicetree binding configuration >>>>>>> for pm7250b. >>>>>>> >>>>>>> Signed-off-by: Manaf Meethalavalappu Pallikunhi >>>>>>> --- >>>>>>>     arch/arm64/boot/dts/qcom/pm7250b.dtsi | 10 ++++++++++ >>>>>>>     1 file changed, 10 insertions(+) >>>>>>> >>>>>>> diff --git a/arch/arm64/boot/dts/qcom/pm7250b.dtsi b/arch/arm64/boot/dts/qcom/pm7250b.dtsi >>>>>>> index 0761e6b5fd8d..69ad76831cde 100644 >>>>>>> --- a/arch/arm64/boot/dts/qcom/pm7250b.dtsi >>>>>>> +++ b/arch/arm64/boot/dts/qcom/pm7250b.dtsi >>>>>>> @@ -202,6 +202,16 @@ pm7250b_gpios: gpio@c000 { >>>>>>>                 interrupt-controller; >>>>>>>                 #interrupt-cells = <2>; >>>>>>>             }; >>>>>>> + >>>>>>> +        bcl@1d00 { >>>>>>> +            compatible = "qcom,pm7250b-bcl", "qcom,bcl-v1"; >>>>>>> +            reg = <0x1d00>; >>>>>>> +            interrupts = , >>>>>>> +                     ; >>>>>>> +            interrupt-names = "bcl-max-min", >>>>>>> +                      "bcl-critical"; >>>>>> We should strip the "bcl-" prefix, since these interrupts happen >>>>>> to be under the bcl device >>>>> Ack >>>>>> >>>>>>> +            overcurrent-thresholds-milliamp = <5500 6000>; >>>>>> Is that something that we expect to change between boards, or is >>>>>> that an electrical characteristic of the PM7250B? >>>>> Yes,  It can change based on battery used for that board as these thresholds will be close below battery OCP spec. >>>>> It is not based on pmic spec. Max current threshold support for specific pmic bcl is taken care in driver pmic data. >>>> >>>> Okay, so this property must not live in the common PMIC DTSI then.. >>> >>> Ack, I will move it into board file wherever it is required in next revision >>> >>>> >>>> I think ideally this could be communicated over battmgr, since it already >>>> has a lot of information about the battery that's currently connected to >>>> the device. Do you think that would be reasonable? Would you know who we >>>> could talk to internally? >>> >>> We are not adding any battery information here. This configuration is specifically for the BCL peripheral to monitor current and trigger an over‑current alarm. While the BCL settings are derived from battery specifications, they are not the same as the battery’s own limits,the BCL thresholds will always be set below the battery’s OCP specification. >>> The intent of the BCL is to provide early detection of over‑current or under‑voltage conditions, notify the SoC/peripherals, and allow corrective action before the system ever reaches the battery’s actual protection limits. >> >> Right, but as you say they are derived from the battery spec, I would >> guesstimate it's something like "90% max current", so swapping out different >> batteries for the same device could potentially affect this value. Since we > > No, there is no predefined equation to derive these values directly from the battery specifications. The actual limits depend on multiple factors, including the underlying mitigation support available on the board for different components (fast path/slow path), the peak‑current use cases defined for that board, the battery characteristics etc. Simply swapping the battery will not automatically make it work. These parameters must be carefully tuned and configured. What I had in mind is that if a battery is dual- (or more-) sourced for a given device by a given vendor, they could perform all that tuning and then store the data alongside other battery configuration that they presumably already are required to include in battmgr for all of the specific battery types they intend to support > I discussed this with the internal battery manager driver team, and they mentioned that the power‑supply framework does not expose any discharging current spec details. Typically, only charging‑current–related information is provided. Right, but the power-supply framework happens to be open-source, so if that would be worth implementing, I think the maintainers would certainly be open to having that discussion (+Sebastian) > For some modern battery use cases, these configurations must also be adjusted dynamically based on factors such as ambient temperature and battery state of charge. The driver already supports this through the hwmon sysfs interface, allowing these values to be overridden at runtime. One could assume that depends on (presumably) proprietary userspace and I would imagine it'd be generally preferred to keep as much charging infra as possible inside the kernel (or even better, in some battle-tested FW). Konrad