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Tue, 23 Apr 2024 18:46:56 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 43NIktmt002045 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 23 Apr 2024 18:46:55 GMT Received: from [10.226.59.182] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 23 Apr 2024 11:46:54 -0700 Message-ID: <5df422b9-d660-e19b-07f1-67f2ee4d018f@quicinc.com> Date: Tue, 23 Apr 2024 12:46:53 -0600 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.6.0 Subject: Re: [PATCH v4 3/3] bus: mhi: host: pci_generic: Add edl callback to enter EDL Content-Language: en-US To: Qiang Yu , CC: , , , , References: <1713868417-37856-1-git-send-email-quic_qianyu@quicinc.com> <1713868417-37856-4-git-send-email-quic_qianyu@quicinc.com> From: Jeffrey Hugo In-Reply-To: <1713868417-37856-4-git-send-email-quic_qianyu@quicinc.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: Ngq_00zODfU5eZIb9KpM_aceti3AzA0G X-Proofpoint-GUID: Ngq_00zODfU5eZIb9KpM_aceti3AzA0G X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1011,Hydra:6.0.650,FMLib:17.11.176.26 definitions=2024-04-23_16,2024-04-23_02,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 priorityscore=1501 spamscore=0 mlxscore=0 bulkscore=0 lowpriorityscore=0 suspectscore=0 impostorscore=0 mlxlogscore=862 adultscore=0 clxscore=1015 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2404010003 definitions=main-2404230043 On 4/23/2024 4:33 AM, Qiang Yu wrote: > Some of the MHI modems like SDX65 based ones are capable of entering the EDL > mode as per the standard triggering mechanism defined in the MHI spec v1.2. So > let's add a common mhi_pci_generic_edl_trigger() function that triggers the EDL > mode in the device when user writes to the /sys/bus/mhi/devices/.../trigger_edl > file. > > Signed-off-by: Qiang Yu Reviewed-by: Jeffrey Hugo