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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5dc186b37b6sm5388019a12.56.2025.01.27.07.16.32 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 27 Jan 2025 07:16:35 -0800 (PST) Message-ID: <60d02c55-0d18-4704-9126-8b8ffef5bd68@oss.qualcomm.com> Date: Mon, 27 Jan 2025 16:16:32 +0100 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v8 2/7] phy: qcom: Introduce PCIe UNIPHY 28LP driver To: Varadarajan Narayanan , lpieralisi@kernel.org, kw@linux.com, manivannan.sadhasivam@linaro.org, robh@kernel.org, bhelgaas@google.com, krzk+dt@kernel.org, conor+dt@kernel.org, vkoul@kernel.org, kishon@kernel.org, andersson@kernel.org, konradybcio@kernel.org, p.zabel@pengutronix.de, dmitry.baryshkov@linaro.org, quic_nsekar@quicinc.com, linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org References: <20250127072850.3777975-1-quic_varada@quicinc.com> <20250127072850.3777975-3-quic_varada@quicinc.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20250127072850.3777975-3-quic_varada@quicinc.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: fDpvh6b8BgGGC-gnUvgSEDymXO-XzVHq X-Proofpoint-ORIG-GUID: fDpvh6b8BgGGC-gnUvgSEDymXO-XzVHq X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-01-27_07,2025-01-27_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 bulkscore=0 phishscore=0 suspectscore=0 mlxscore=0 impostorscore=0 priorityscore=1501 adultscore=0 malwarescore=0 clxscore=1015 spamscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2501270122 On 27.01.2025 8:28 AM, Varadarajan Narayanan wrote: > From: Nitheesh Sekar > > Add Qualcomm PCIe UNIPHY 28LP driver support present > in Qualcomm IPQ5332 SoC and the phy init sequence. > > Reviewed-by: Dmitry Baryshkov > Signed-off-by: Nitheesh Sekar > Signed-off-by: Varadarajan Narayanan > --- [...] > + usleep_range(CLK_EN_DELAY_MIN_US, CLK_EN_DELAY_MAX_US); > + > + qcom_uniphy_pcie_init(phy); > + return 0; Please add a newline before the return statement [...] > +static int qcom_uniphy_pcie_probe(struct platform_device *pdev) > +{ > + struct phy_provider *phy_provider; > + struct device *dev = &pdev->dev; > + struct qcom_uniphy_pcie *phy; > + struct phy *generic_phy; > + int ret; > + > + phy = devm_kzalloc(&pdev->dev, sizeof(*phy), GFP_KERNEL); > + if (!phy) > + return -ENOMEM; > + > + platform_set_drvdata(pdev, phy); > + phy->dev = &pdev->dev; > + > + phy->data = of_device_get_match_data(dev); > + if (!phy->data) > + return -EINVAL; > + > + phy->lanes = 1; > + if (of_property_read_u32(dev_of_node(dev), "num-lanes", &phy->lanes)) > + dev_info(dev, "Not able to get num-lanes. Assuming 1\n"); return dev_err_probe(dev, ret, "Couldn't read num-lanes\n"); And please make num-lanes required in bindings there We don't want silent fallbacks in such cases, as it's easy to miss those and e.g. ship a product which would then run the PCIe link at half the speed Konrad