Re: [PATCH V3 1/4] dt-bindings: mmc: Add dll-hsr-list for HS400 and HS200 modes

[Krzysztof Kozlowski <krzk@kernel.org>]

On 27/06/2025 15:57, Konrad Dybcio wrote:
> On 6/26/25 7:42 PM, Krzysztof Kozlowski wrote:
>> On 26/06/2025 16:16, Ram Prakash Gupta wrote:
>>> On 1/22/2025 3:56 PM, Krzysztof Kozlowski wrote:
>>>> On 22/01/2025 10:47, Sachin Gupta wrote:
>>>>> Document the 'dll-hsr-list' property for MMC device tree bindings.
>>>>> The 'dll-hsr-list' property defines the DLL configurations for HS400
>>>>> and HS200 modes.
>>>>>
>>>>> Signed-off-by: Sachin Gupta <quic_sachgupt@quicinc.com>
>>>>> ---
>>>>>  Documentation/devicetree/bindings/mmc/sdhci-msm.yaml | 5 +++++
>>>>>  1 file changed, 5 insertions(+)
>>>>>
>>>>> diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
>>>>> index 8b393e26e025..65dc3053df75 100644
>>>>> --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
>>>>> +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
>>>>> @@ -133,6 +133,11 @@ properties:
>>>>>      $ref: /schemas/types.yaml#/definitions/uint32
>>>>>      description: platform specific settings for DLL_CONFIG reg.
>>>>>  
>>>>> +  qcom,dll-hsr-list:
>>>>> +    maxItems: 10
>>>>> +    $ref: /schemas/types.yaml#/definitions/uint32
>>>> uint32 has only one item. Anyway, there is already DLL there, so don't
>>>> duplicate or explain why this is different. Explain also why this is not
>>>> deducible from the compatible.
>>>
>>
>>
>> Timeline still amazes me. I will be grumpy on this thread.
>>
>>> I will change it to reflect array from uint32.
>>> There is change with artanis DLL hw addition where it need total of 5 entries
>>> (dll_config, dll_config_2, dll_config_3, dll_usr_ctl, ddr_config)
>>> for each HS400 and HS200 modes, hence the new addition in dt. And these values
>>> are not fixed and varies for every SoC, hence this needs to be passed through
>>> dt like it was passed earlier for qcom,dll-config & qcom,ddr-config.
>>
>>
>> Eh, no. That's not a valid reason. It's still SoC deducible. Don't bring
>> your downstream practices here, but remove EVERYTHING from downstream
>> and start doing things like upstream is doing.
> 
> QC SoCs have between 0 and 4 SDHCI instances, each one potentially requiring
> different tuning, let's keep this data in DT


OK, this should be explained in commit msg.

Best regards,
Krzysztof