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Thu, 23 Jan 2025 12:08:41 +0000 (GMT) Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 50NC8f4S003219 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 23 Jan 2025 12:08:41 GMT Received: from [10.151.36.43] (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 23 Jan 2025 04:08:37 -0800 Message-ID: <63609692-ebfc-b0d2-cf7e-b6f591a34e7e@quicinc.com> Date: Thu, 23 Jan 2025 17:38:15 +0530 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.15.1 Subject: Re: [PATCH v3] dmaengine: qcom: bam_dma: Fix BAM_RIVISON register handling Content-Language: en-US To: Dmitry Baryshkov CC: , , , , , , , , References: <20250121091241.2646532-1-quic_mdalam@quicinc.com> From: Md Sadre Alam In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: aPBRPPJbwaTEn6IdcdnIKMawolT-f7Xu X-Proofpoint-GUID: aPBRPPJbwaTEn6IdcdnIKMawolT-f7Xu X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-01-23_05,2025-01-22_02,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 phishscore=0 priorityscore=1501 suspectscore=0 bulkscore=0 clxscore=1015 lowpriorityscore=0 mlxlogscore=999 impostorscore=0 malwarescore=0 mlxscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2501230092 On 1/21/2025 4:24 PM, Dmitry Baryshkov wrote: > On Tue, Jan 21, 2025 at 02:42:41PM +0530, Md Sadre Alam wrote: >> This patch resolves a bug from the previous commit where the > > Please check Documentation/process/submitting-patches.rst, 'This > patch...' Ok > >> BAM_DESC_CNT_TRSHLD register was conditionally written based on BAM-NDP >> mode. The issue was reading the BAM_REVISION register hanging if num-ees > > First start with the issue description, then proceed to the changes > description. Ok > >> was not zero, which occurs when the SoCs power on BAM remotely. So the >> BAM_REVISION register read has been moved to inside if condition. > > Imperative language, please. While we are at it, please also fix commit > subject. Sure , will fix this in next revision. > >> >> Fixes: 57a7138d0627 ("dmaengine: qcom: bam_dma: Avoid writing unavailable register") >> Reported-by: Georgi Djakov >> Link: https://lore.kernel.org/lkml/9ef3daa8-cdb1-49f2-8d19-a72d6210ff3a@kernel.org/ >> Signed-off-by: Md Sadre Alam >> --- >> >> Change in [v3] >> >> * Revised commit details >> >> Change in [v2] >> >> * Removed unnecessary if checks. >> * Relocated the BAM_REVISION register read within the if condition. >> >> Change in [v1] >> >> * https://lore.kernel.org/lkml/1a5fc7e9-39fe-e527-efc3-1ea990bbb53b@quicinc.com/ >> * Posted initial fixup for BAM revision register read handling >> drivers/dma/qcom/bam_dma.c | 8 ++++---- >> 1 file changed, 4 insertions(+), 4 deletions(-) >> >> diff --git a/drivers/dma/qcom/bam_dma.c b/drivers/dma/qcom/bam_dma.c >> index c14557efd577..d227b4f5b6b9 100644 >> --- a/drivers/dma/qcom/bam_dma.c >> +++ b/drivers/dma/qcom/bam_dma.c >> @@ -1199,11 +1199,11 @@ static int bam_init(struct bam_device *bdev) >> u32 val; >> >> /* read revision and configuration information */ > > Please extend the comment, mentioning why the register is read only in > !num_ees case. BTW: how do we get revision if num_ees != 0? This revision register we need only to differentiate b/w BAM-Lite and BAM-NDP. if num_ees != 0 then no need read this revision register. The SOCs which is having BAM-NDP and BAM-Lite having num_ees = 0. > >> - val = readl_relaxed(bam_addr(bdev, 0, BAM_REVISION)); >> - if (!bdev->num_ees) >> + if (!bdev->num_ees) { >> + val = readl_relaxed(bam_addr(bdev, 0, BAM_REVISION)); >> bdev->num_ees = (val >> NUM_EES_SHIFT) & NUM_EES_MASK; >> - >> - bdev->bam_revision = val & REVISION_MASK; >> + bdev->bam_revision = val & REVISION_MASK; >> + } >> >> /* check that configured EE is within range */ >> if (bdev->ee >= bdev->num_ees) >> -- >> 2.34.1 >> >