From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sricharan R Subject: Re: [PATCH 06/15] ARM: dts: ipq4019: Add ipq4019-ap.dk04.dtsi Date: Tue, 6 Feb 2018 11:31:10 +0530 Message-ID: <65ec9aef-c712-b8de-8da0-c1211ea0fbb3@codeaurora.org> References: <1517202689-14212-1-git-send-email-sricharan@codeaurora.org> <1517202689-14212-7-git-send-email-sricharan@codeaurora.org> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Return-path: Received: from smtp.codeaurora.org ([198.145.29.96]:58678 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750841AbeBFGBT (ORCPT ); Tue, 6 Feb 2018 01:01:19 -0500 In-Reply-To: Content-Language: en-US Sender: linux-arm-msm-owner@vger.kernel.org List-Id: linux-arm-msm@vger.kernel.org To: Abhishek Sahu Cc: mark.rutland@arm.com, robh@kernel.org, devicetree@vger.kernel.org, catalin.marinas@arm.com, will.deacon@arm.com, linux@armlinux.org.uk, bjorn.andersson@linaro.org, david.brown@linaro.org, robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, andy.gross@linaro.org, linux-arm-msm-owner@vger.kernel.org, linux-soc@vger.kernel.org, sboyd@codeaurora.org, linux-kernel@vger.kernel.org Hi Abhishek, On 2/3/2018 4:47 PM, Abhishek Sahu wrote: > On 2018-01-29 10:41, Sricharan R wrote: >> Add the common parts for the dk04 boards. >> >> Signed-off-by: Sricharan R >> --- >>  arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi | 147 > >   >> + >> +            nand_pins: nand_pins { >> +                pullups { >> +                    pins = "gpio52", "gpio53", >> "gpio58", >> +                        "gpio59"; >> +                    function = "qpic"; >> +                    bias-pull-up; >> +                }; >> + >> +                pulldowns { >> +                    pins = "gpio54", "gpio55", >> "gpio56", >> +                        "gpio57", "gpio60", >> "gpio61", >> +                        "gpio62", "gpio63", >> "gpio64", >> +                        "gpio65", "gpio66", >> "gpio67", >> +                        "gpio68", "gpio69"; >> +                    function = "qpic"; >> +                    bias-pull-down; >> +                }; >> +            }; > >  Can you please check once why do we need pull-up and >  pull-down for NAND pins. The NAND chip will be mounted >  over board itself so board design should take care of >  required pull up and pull downs. > Mostly because, these are always **weak** pull up/down as defaults and should be overridden by the ones in the board (if there). >  Also, some of the above pins like gpio52 will be only used >  for LCD so we can remove those pins. Later on, when LCD >  support will be added, we can add those pins. ok Regards, Sricharan -- "QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation