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([2a01:e0a:982:cbb0:e265:b513:556a:4149]) by smtp.gmail.com with ESMTPSA id d2-20020adffbc2000000b003060c7b5ed6sm7864485wrs.26.2023.05.02.01.38.50 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 02 May 2023 01:38:51 -0700 (PDT) Message-ID: <68144145-123e-9676-839b-28e7db5bc2bd@linaro.org> Date: Tue, 2 May 2023 10:38:49 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.10.0 Reply-To: neil.armstrong@linaro.org Subject: Re: [PATCH 04/10] clk: qcom: gcc-mdm9615: use ARRAY_SIZE instead of specifying num_parents Content-Language: en-US To: Dmitry Baryshkov , Andy Gross , Bjorn Andersson , Konrad Dybcio , Stephen Boyd , Michael Turquette , Rob Herring , Krzysztof Kozlowski , Taniya Das Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org References: <20230501203401.41393-1-dmitry.baryshkov@linaro.org> <20230501203401.41393-5-dmitry.baryshkov@linaro.org> From: Neil Armstrong Organization: Linaro Developer Services In-Reply-To: <20230501203401.41393-5-dmitry.baryshkov@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 01/05/2023 22:33, Dmitry Baryshkov wrote: > Use ARRAY_SIZE() instead of manually specifying num_parents. This makes > adding/removing entries to/from parent_data easy and errorproof. > > Signed-off-by: Dmitry Baryshkov > --- > drivers/clk/qcom/gcc-mdm9615.c | 42 +++++++++++++++++----------------- > 1 file changed, 21 insertions(+), 21 deletions(-) > > diff --git a/drivers/clk/qcom/gcc-mdm9615.c b/drivers/clk/qcom/gcc-mdm9615.c > index 8bed02a748ab..fb5c1244fb97 100644 > --- a/drivers/clk/qcom/gcc-mdm9615.c > +++ b/drivers/clk/qcom/gcc-mdm9615.c > @@ -207,7 +207,7 @@ static struct clk_rcg gsbi1_uart_src = { > .hw.init = &(struct clk_init_data){ > .name = "gsbi1_uart_src", > .parent_names = gcc_cxo_pll8, > - .num_parents = 2, > + .num_parents = ARRAY_SIZE(gcc_cxo_pll8), > .ops = &clk_rcg_ops, > .flags = CLK_SET_PARENT_GATE, > }, > @@ -258,7 +258,7 @@ static struct clk_rcg gsbi2_uart_src = { > .hw.init = &(struct clk_init_data){ > .name = "gsbi2_uart_src", > .parent_names = gcc_cxo_pll8, > - .num_parents = 2, > + .num_parents = ARRAY_SIZE(gcc_cxo_pll8), > .ops = &clk_rcg_ops, > .flags = CLK_SET_PARENT_GATE, > }, > @@ -309,7 +309,7 @@ static struct clk_rcg gsbi3_uart_src = { > .hw.init = &(struct clk_init_data){ > .name = "gsbi3_uart_src", > .parent_names = gcc_cxo_pll8, > - .num_parents = 2, > + .num_parents = ARRAY_SIZE(gcc_cxo_pll8), > .ops = &clk_rcg_ops, > .flags = CLK_SET_PARENT_GATE, > }, > @@ -360,7 +360,7 @@ static struct clk_rcg gsbi4_uart_src = { > .hw.init = &(struct clk_init_data){ > .name = "gsbi4_uart_src", > .parent_names = gcc_cxo_pll8, > - .num_parents = 2, > + .num_parents = ARRAY_SIZE(gcc_cxo_pll8), > .ops = &clk_rcg_ops, > .flags = CLK_SET_PARENT_GATE, > }, > @@ -411,7 +411,7 @@ static struct clk_rcg gsbi5_uart_src = { > .hw.init = &(struct clk_init_data){ > .name = "gsbi5_uart_src", > .parent_names = gcc_cxo_pll8, > - .num_parents = 2, > + .num_parents = ARRAY_SIZE(gcc_cxo_pll8), > .ops = &clk_rcg_ops, > .flags = CLK_SET_PARENT_GATE, > }, > @@ -474,7 +474,7 @@ static struct clk_rcg gsbi1_qup_src = { > .hw.init = &(struct clk_init_data){ > .name = "gsbi1_qup_src", > .parent_names = gcc_cxo_pll8, > - .num_parents = 2, > + .num_parents = ARRAY_SIZE(gcc_cxo_pll8), > .ops = &clk_rcg_ops, > .flags = CLK_SET_PARENT_GATE, > }, > @@ -523,7 +523,7 @@ static struct clk_rcg gsbi2_qup_src = { > .hw.init = &(struct clk_init_data){ > .name = "gsbi2_qup_src", > .parent_names = gcc_cxo_pll8, > - .num_parents = 2, > + .num_parents = ARRAY_SIZE(gcc_cxo_pll8), > .ops = &clk_rcg_ops, > .flags = CLK_SET_PARENT_GATE, > }, > @@ -572,7 +572,7 @@ static struct clk_rcg gsbi3_qup_src = { > .hw.init = &(struct clk_init_data){ > .name = "gsbi3_qup_src", > .parent_names = gcc_cxo_pll8, > - .num_parents = 2, > + .num_parents = ARRAY_SIZE(gcc_cxo_pll8), > .ops = &clk_rcg_ops, > .flags = CLK_SET_PARENT_GATE, > }, > @@ -621,7 +621,7 @@ static struct clk_rcg gsbi4_qup_src = { > .hw.init = &(struct clk_init_data){ > .name = "gsbi4_qup_src", > .parent_names = gcc_cxo_pll8, > - .num_parents = 2, > + .num_parents = ARRAY_SIZE(gcc_cxo_pll8), > .ops = &clk_rcg_ops, > .flags = CLK_SET_PARENT_GATE, > }, > @@ -670,7 +670,7 @@ static struct clk_rcg gsbi5_qup_src = { > .hw.init = &(struct clk_init_data){ > .name = "gsbi5_qup_src", > .parent_names = gcc_cxo_pll8, > - .num_parents = 2, > + .num_parents = ARRAY_SIZE(gcc_cxo_pll8), > .ops = &clk_rcg_ops, > .flags = CLK_SET_PARENT_GATE, > }, > @@ -725,7 +725,7 @@ static struct clk_rcg gp0_src = { > .hw.init = &(struct clk_init_data){ > .name = "gp0_src", > .parent_names = gcc_cxo, > - .num_parents = 1, > + .num_parents = ARRAY_SIZE(gcc_cxo), > .ops = &clk_rcg_ops, > .flags = CLK_SET_PARENT_GATE, > }, > @@ -774,7 +774,7 @@ static struct clk_rcg gp1_src = { > .hw.init = &(struct clk_init_data){ > .name = "gp1_src", > .parent_names = gcc_cxo, > - .num_parents = 1, > + .num_parents = ARRAY_SIZE(gcc_cxo), > .ops = &clk_rcg_ops, > .flags = CLK_SET_RATE_GATE, > }, > @@ -823,7 +823,7 @@ static struct clk_rcg gp2_src = { > .hw.init = &(struct clk_init_data){ > .name = "gp2_src", > .parent_names = gcc_cxo, > - .num_parents = 1, > + .num_parents = ARRAY_SIZE(gcc_cxo), > .ops = &clk_rcg_ops, > .flags = CLK_SET_RATE_GATE, > }, > @@ -875,7 +875,7 @@ static struct clk_rcg prng_src = { > .hw.init = &(struct clk_init_data){ > .name = "prng_src", > .parent_names = gcc_cxo_pll8, > - .num_parents = 2, > + .num_parents = ARRAY_SIZE(gcc_cxo_pll8), > .ops = &clk_rcg_ops, > }, > }, > @@ -937,7 +937,7 @@ static struct clk_rcg sdc1_src = { > .hw.init = &(struct clk_init_data){ > .name = "sdc1_src", > .parent_names = gcc_cxo_pll8, > - .num_parents = 2, > + .num_parents = ARRAY_SIZE(gcc_cxo_pll8), > .ops = &clk_rcg_ops, > }, > } > @@ -985,7 +985,7 @@ static struct clk_rcg sdc2_src = { > .hw.init = &(struct clk_init_data){ > .name = "sdc2_src", > .parent_names = gcc_cxo_pll8, > - .num_parents = 2, > + .num_parents = ARRAY_SIZE(gcc_cxo_pll8), > .ops = &clk_rcg_ops, > }, > } > @@ -1038,7 +1038,7 @@ static struct clk_rcg usb_hs1_xcvr_src = { > .hw.init = &(struct clk_init_data){ > .name = "usb_hs1_xcvr_src", > .parent_names = gcc_cxo_pll8, > - .num_parents = 2, > + .num_parents = ARRAY_SIZE(gcc_cxo_pll8), > .ops = &clk_rcg_ops, > .flags = CLK_SET_RATE_GATE, > }, > @@ -1087,7 +1087,7 @@ static struct clk_rcg usb_hsic_xcvr_fs_src = { > .hw.init = &(struct clk_init_data){ > .name = "usb_hsic_xcvr_fs_src", > .parent_names = gcc_cxo_pll8, > - .num_parents = 2, > + .num_parents = ARRAY_SIZE(gcc_cxo_pll8), > .ops = &clk_rcg_ops, > .flags = CLK_SET_RATE_GATE, > }, > @@ -1142,7 +1142,7 @@ static struct clk_rcg usb_hs1_system_src = { > .hw.init = &(struct clk_init_data){ > .name = "usb_hs1_system_src", > .parent_names = gcc_cxo_pll8, > - .num_parents = 2, > + .num_parents = ARRAY_SIZE(gcc_cxo_pll8), > .ops = &clk_rcg_ops, > .flags = CLK_SET_RATE_GATE, > }, > @@ -1197,7 +1197,7 @@ static struct clk_rcg usb_hsic_system_src = { > .hw.init = &(struct clk_init_data){ > .name = "usb_hsic_system_src", > .parent_names = gcc_cxo_pll8, > - .num_parents = 2, > + .num_parents = ARRAY_SIZE(gcc_cxo_pll8), > .ops = &clk_rcg_ops, > .flags = CLK_SET_RATE_GATE, > }, > @@ -1252,7 +1252,7 @@ static struct clk_rcg usb_hsic_hsic_src = { > .hw.init = &(struct clk_init_data){ > .name = "usb_hsic_hsic_src", > .parent_names = gcc_cxo_pll14, > - .num_parents = 2, > + .num_parents = ARRAY_SIZE(gcc_cxo_pll14), > .ops = &clk_rcg_ops, > .flags = CLK_SET_RATE_GATE, > }, Reviewed-by: Neil Armstrong