From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CD55918A92A; Tue, 30 Jul 2024 10:12:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722334328; cv=none; b=afGiXtaftWZBdzZtQABkVaCaogMaIVoxHty7fQqegEsr/fH5yZMVUkbdUSPQywdDh8GCXW2Pt5m4aahdu3kR80UkNROAWwbdENLGdKC8iRQQww+HtHHgSC1xW37ffOujH7uy6khrWFx5kGqclfp42pLtnYh3SmBJWdUTIHltHI4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722334328; c=relaxed/simple; bh=ZvLJ7/SCtIJfceG7grSTidcofEdpC9aUrnISK46Oynk=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=VCqXqXylAQAsbvsL3w7iaVZGwzV2H3X6J+C7O0wgFNhFiTA10LuC0yU5Olj7p2FLB97aRiVSxRYIas+ooUjJziZUHMrZTXglur4kmuFdFyrG13UPNG099H1IySxeAoUOJ+Smol39z3gV7ViVdvwvuodptnC+NPPByl1uHU07t24= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=TzAkECY4; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="TzAkECY4" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0A35EC4AF0B; Tue, 30 Jul 2024 10:12:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1722334328; bh=ZvLJ7/SCtIJfceG7grSTidcofEdpC9aUrnISK46Oynk=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=TzAkECY4JNH4TLHCFfcsFDcb5DKrTkXbLmxGBDeyy9sggTlAlbXVWZxCEQOF5LaHk OYMT2h/VZy297tSeX2CHiotuYPJQAxVUrKil0NKFe/ElEDSzIfWiZKa32gWNDOpgNU DzEWtU5nQ8rvJSxMrAiRio1DmnVSzAFS1Mn2B0BJbVZ9UcI2zwRRt8MlOnYdJclLrW 8VyEDJIZO49Kldu0UVtR9ERik+1hQLn0NqYXva40Wg5M2q+2ZOVJVPcajAFTHF2wJs 1hKdOQQM7zvUPdykgB/UhRddR/3NgWkRA162NSnsujO5BhAraLFigbbLGboDC4JBTj I/u8oC/78F/iQ== Message-ID: <691ee925-b214-4b68-8d7b-ecb54f865cfc@kernel.org> Date: Tue, 30 Jul 2024 12:12:01 +0200 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] iommu/arm-smmu-qcom: Work around SDM845 Adreno SMMU w/ 16K pages To: Dmitry Baryshkov Cc: Rob Clark , Konrad Dybcio , Bjorn Andersson , Will Deacon , Robin Murphy , Joerg Roedel , Marijn Suijten , iommu@lists.linux.dev, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Konrad Dybcio , Sumit Semwal References: <20240729-topic-845_gpu_smmu-v1-1-8e372abbde41@kernel.org> <3332c732-4555-46bf-af75-aa36ce2d58df@gmail.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 30.07.2024 10:50 AM, Dmitry Baryshkov wrote: > On Tue, 30 Jul 2024 at 11:08, Konrad Dybcio wrote: >> >> On 29.07.2024 11:21 PM, Dmitry Baryshkov wrote: >>> On Tue, 30 Jul 2024 at 00:08, Rob Clark wrote: >>>> >>>> On Mon, Jul 29, 2024 at 1:14 PM Dmitry Baryshkov >>>> wrote: >>>>> >>>>> On Mon, Jul 29, 2024 at 10:37:48AM GMT, Konrad Dybcio wrote: >>>>>> From: Konrad Dybcio >>>>>> >>>>>> SDM845's Adreno SMMU is unique in that it actually advertizes support >>>>>> for 16K (and 32M) pages, which doesn't hold for newer SoCs. >>>>>> >>>>>> This however, seems either broken in the hardware implementation, the >>>>>> hypervisor middleware that abstracts the SMMU, or there's a bug in the >>>>>> Linux kernel somewhere down the line that nobody managed to track down. >>>>>> >>>>>> Booting SDM845 with 16K page sizes and drm/msm results in: >>>>>> >>>>>> *** gpu fault: ttbr0=0000000000000000 iova=000100000000c000 dir=READ >>>>>> type=TRANSLATION source=CP (0,0,0,0) >>>>>> >>>>>> right after loading the firmware. The GPU then starts spitting out >>>>>> illegal intstruction errors, as it's quite obvious that it got a >>>>>> bogus pointer. >>>>>> >>>>>> Hide 16K support on SDM845's Adreno SMMU to work around this. >>>>>> >>>>>> Reported-by: Sumit Semwal >>>>>> Signed-off-by: Konrad Dybcio >>>>>> --- >>>>>> There's a mismatch in sender/committer addresses but that's "fine": >>>>>> https://lore.kernel.org/linux-usb/2024072734-scenic-unwilling-71ea@gregkh/ >>>>>> --- >>>>>> drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 10 ++++++++++ >>>>>> 1 file changed, 10 insertions(+) >>>>>> >>>>>> diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c >>>>>> index 36c6b36ad4ff..d25825c05817 100644 >>>>>> --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c >>>>>> +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c >>>>>> @@ -338,6 +338,15 @@ static int qcom_smmu_cfg_probe(struct arm_smmu_device *smmu) >>>>>> return 0; >>>>>> } >>>>>> >>>>>> +static int qcom_adreno_smmuv2_cfg_probe(struct arm_smmu_device *smmu) >>>>>> +{ >>>>>> + /* SDM845 Adreno SMMU advertizes 16K pages support, but something is broken */ >>>>>> + if (of_device_is_compatible(smmu->dev->of_node, "qcom,sdm845-smmu-v2")) >>>>>> + smmu->features &= ~ARM_SMMU_FEAT_FMT_AARCH64_16K; >>>>> >>>>> Shouldn't we hide that uncoditionally as it's likely that none of v2 >>>>> Adreno SMMUs support 16k pages? >>>> >>>> Hmm, that would be unfortunate to have the GPU not supporting the CPU >>>> page size. I guess we could still map 16k pages as multiple 4k pages, >>>> but that is a bit sad.. >>> >>> For now this might be limited to older platforms (v2 vs -500) >> >> In the commit message: >> >>>>>> SDM845's Adreno SMMU is unique in that it actually advertizes support >>>>>> for 16K (and 32M) pages, which doesn't hold for newer SoCs. > > My question is about forbidding 16k pages for sdm845 only or for other > chips too. I'd assume that it shouldn't also work for other smmu-v2 > platforms. I'd say we shouldn't cause trouble unless we know it's an issue Konrad