Re: [PATCH 16/16] drm/msm/adreno: Expose a PARAM to check AQE support

Connor Abbott
2026-03-23T22:54:33Z

On Mon, Mar 23, 2026 at 5:36 PM Dmitry Baryshkov
<dmitry.baryshkov@oss.qualcomm.com> wrote:
>
> On Tue, Mar 24, 2026 at 01:42:28AM +0530, Akhil P Oommen wrote:
> > AQE (Applicaton Qrisc Engine) is required to support VK ray-pipeline. Two
> > conditions should be met to use this HW:
> > 1. AQE firmware should be loaded and programmed
> > 2. Preemption support
> >
> > Expose a new MSM_PARAM to allow userspace to query its support.
> >
> > Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
> > ---
> > drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 13 +++++++++++++
> > drivers/gpu/drm/msm/adreno/adreno_gpu.c | 4 ++++
> > drivers/gpu/drm/msm/adreno/adreno_gpu.h | 1 +
> > include/uapi/drm/msm_drm.h | 1 +
> > 4 files changed, 19 insertions(+)
> >
> > diff --git a/include/uapi/drm/msm_drm.h b/include/uapi/drm/msm_drm.h
> > index 5c67294edc95..b99098792371 100644
> > --- a/include/uapi/drm/msm_drm.h
> > +++ b/include/uapi/drm/msm_drm.h
> > @@ -117,6 +117,7 @@ struct drm_msm_timespec {
> > * ioctl will throw -EPIPE.
> > */
> > #define MSM_PARAM_EN_VM_BIND 0x16 /* WO, once */
> > +#define MSM_PARAM_AQE 0x17 /* RO */
> >
> > /* For backwards compat. The original support for preemption was based on
> > * a single ring per priority level so # of priority levels equals the #
> >
>
> I think this also requires a version bump in msm_drv.c

Not really. We can just assume it's not there if the ioctl returns
-EINVAL, like the other queries we've added recently.

Connor

>
>
> --
> With best wishes
> Dmitry