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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ac2394fda1asm904961866b.78.2025.03.11.04.19.02 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 11 Mar 2025 04:19:05 -0700 (PDT) Message-ID: <69fa7f33-e957-4dac-93dc-6fd40167873c@oss.qualcomm.com> Date: Tue, 11 Mar 2025 12:19:01 +0100 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 6/9] phy: qcom: Add M31 based eUSB2 PHY driver To: Melody Olvera , Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wesley Cheng , Greg Kroah-Hartman , Philipp Zabel , Bjorn Andersson , Konrad Dybcio , Catalin Marinas , Will Deacon Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, linux-arm-kernel@lists.infradead.org References: <20250304-sm8750_usb_master-v2-0-a698a2e68e06@quicinc.com> <20250304-sm8750_usb_master-v2-6-a698a2e68e06@quicinc.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20250304-sm8750_usb_master-v2-6-a698a2e68e06@quicinc.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: 1xrNswn2fumiIuqMC8gvdKIkblkHK7dC X-Proofpoint-GUID: 1xrNswn2fumiIuqMC8gvdKIkblkHK7dC X-Authority-Analysis: v=2.4 cv=MICamNZl c=1 sm=1 tr=0 ts=67d01c2b cx=c_pps a=UgVkIMxJMSkC9lv97toC5g==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=Vs1iUdzkB0EA:10 a=COk6AnOGAAAA:8 a=obrcSLqBe2MPJ_po3l0A:9 a=QEXdDO2ut3YA:10 a=T1PIRxOFuHhLvSGs3xkl:22 a=1HOtulTD9v-eNWfpl4qZ:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1093,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-03-11_01,2025-03-11_02,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 mlxlogscore=855 lowpriorityscore=0 phishscore=0 spamscore=0 suspectscore=0 priorityscore=1501 malwarescore=0 mlxscore=0 adultscore=0 bulkscore=0 clxscore=1015 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2502100000 definitions=main-2503110075 On 3/4/25 10:56 PM, Melody Olvera wrote: > From: Wesley Cheng > > SM8750 utilizes an eUSB2 PHY from M31. Add the initialization > sequences to bring it out of reset and into an operational state. This > differs to the M31 USB driver, in that the M31 eUSB2 driver will > require a connection to an eUSB2 repeater. This PHY driver will handle > the initialization of the associated eUSB2 repeater when required. > > Signed-off-by: Wesley Cheng > Signed-off-by: Melody Olvera > --- [...] > +static int msm_m31_eusb2_write_readback(void __iomem *base, u32 offset, > + const u32 mask, u32 val) > +{ > + u32 write_val; > + u32 tmp; > + > + tmp = readl_relaxed(base + offset); > + tmp &= ~mask; > + write_val = tmp | val; > + > + writel_relaxed(write_val, base + offset); > + > + tmp = readl_relaxed(base + offset); > + tmp &= mask; > + > + if (tmp != val) { > + pr_err("write: %x to offset: %x FAILED\n", val, offset); > + return -EINVAL; > + } > + > + return 0; Is there a reason we need to read back every write? Does this have to do with some funny write buffering? Konrad