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[212.182.62.129]) by smtp.gmail.com with ESMTPSA id p26-20020a19f01a000000b005100ed58b76sm207756lfc.308.2024.01.24.04.31.07 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 24 Jan 2024 04:31:08 -0800 (PST) Message-ID: <6aa58497-9727-4601-b6eb-264c478997c3@linaro.org> Date: Wed, 24 Jan 2024 13:31:06 +0100 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 00/12] Unregister critical branch clocks + some RPM Content-Language: en-US To: Abel Vesa Cc: Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Johan Hovold , Bryan O'Donoghue References: <20230717-topic-branch_aon_cleanup-v6-0-46d136a4e8d0@linaro.org> From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 1/24/24 08:41, Abel Vesa wrote: > On 24-01-13 15:50:49, Konrad Dybcio wrote: >> On Qualcomm SoCs, certain branch clocks either need to be always-on, or >> should be if you're interested in touching some part of the hardware. >> >> Using CLK_IS_CRITICAL for this purpose sounds like a genius idea, >> however that messes with the runtime pm handling - if a clock is >> marked as such, the clock controller device will never enter the >> "suspended" state, leaving the associated resources online, which in >> turn breaks SoC-wide suspend. > > Generally speaking, HW-wise, if the power domain of a clock controller > is being disabled, all clocks that it provides are being disabled. Generally speaking, if that's the case, that's true. > > Are you saying that is not the case ? Dragons however, are peculiar creatures and it seems like the clock controllers are not *really* disabled when we think they are, e.g. due to RPM(h) owning a share of GCC clocks, or due to the MX rail being always-on. It would indeed be an issue with hibernation where the registers would need to be reprogrammed after battery power is removed. As we spoke off-list, I'll split this series into two: adding common helpers and then taking care of 2290/6375/6115. I'm not yet sure how far we can go with converting existing clock drivers to use pm_clk_add so that the _AHB, _XO, and _SLEEP clocks for a given subsystem are only enabled when necessary - if we require an entry in clock-names, backwards compatibility goes away, and if we don't - we potentially miss out on a devlink between X_CC and GCC, plus the name needs to be hardcoded for global parent lookup. For new drivers, we'll likely just require a clean solution (runtime PM enabled + subsys clocks gotten as pm_clk through a dt entry on the consumer). Konrad