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charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: L67owrOKpGPn5jZbnZJTlZgTnh-G2LGg X-Authority-Analysis: v=2.4 cv=fLgJG5ae c=1 sm=1 tr=0 ts=6a44edc9 cx=c_pps a=mPf7EqFMSY9/WdsSgAYMbA==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=3WHJM1ZQz_JShphwDgj5:22 a=EUspDBNiAAAA:8 a=-pX6LU1wS3kVf0kvi8wA:9 a=QEXdDO2ut3YA:10 a=dawVfQjAaf238kedN5IG:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzAxMDExMCBTYWx0ZWRfX2hBzVCO0cVWs 7Mc/93tpg22bSJ7GnbIMQame4go0ukOkY3DotoKsy0I3f3LeVNwTz/ZjTpusq0ihX53QtV/0r8b 8KckIGt708kFReyiV9nnNdRoRsNZEu4MhH4WbJHjmcOOhM+UAKL3jjdEjQXGKQin/t7+B5rPfVM gCxX6AqggWI/Ea1glsyTwknswN3/QzvklcCMW+UhcaIYuacNExAPal/YxlNnCjP29B29l+35KCA VuOr4rROqs8y3fdZTdIaeojTS7K19US1xWB0qbgvEviXNgpjIRFtBzkLRrgFY2X3Kkzu2fVnKrM TQbfxetzhke2cepqDk3ZuNioR5AMH/x9bCWwG3q1CkJMZ6vLoD3mamUNr5m/cBQTVEt9pAHxdb6 z/ax9XTOKYp2nEBQ4zMtMcqIJHLRjG8lE8YeXlZcMiG9A+0YDfSrSZtrYaabOmNDx6+VVbptSrh mu5a0FVNmAJ5kCBTk9Q== X-Proofpoint-ORIG-GUID: L67owrOKpGPn5jZbnZJTlZgTnh-G2LGg X-Proofpoint-Spam-Info: AW1haW4tMjYwNzAxMDExMCBTYWx0ZWRfX4xaYGLf/la5c 1M7iRJ4iiUT5U6Dq135KPCEdViqUP+eikZAnRjNe6VAwPfGotDeK0kG8H4PoYoUtC2/yFWwPyQf RgLtUdnLxM7A9N+MLRWk2bJ9pDPmG0k= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-07-01_03,2026-06-26_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 phishscore=0 malwarescore=0 suspectscore=0 priorityscore=1501 bulkscore=0 spamscore=0 adultscore=0 lowpriorityscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607010110 On 6/30/26 9:02 PM, Sushrut Shree Trivedi wrote: > Enable the PCIe PHY for the single PCIe intance on the Shikra > CQS, CQM and the IQS platforms. > > IQS platform uses a different powergrid than CQS/CQM which explain > the different PHY supplies for IQS variant. > > Signed-off-by: Sushrut Shree Trivedi > --- > arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts | 7 +++++++ > arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts | 7 +++++++ > arch/arm64/boot/dts/qcom/shikra-iqs-evk.dts | 7 +++++++ > 3 files changed, 21 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts b/arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts > index 683b5245923b..06ad32041546 100644 > --- a/arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts > +++ b/arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts > @@ -60,6 +60,13 @@ vreg_pmu_ch1: ldo4 { > }; > }; > > +&pcie_phy { > + vdda-phy-supply = <&pm4125_l13>; > + vdda-pll-supply = <&pm4125_l9>; > + > + status = "okay"; > +}; I think it makes sense to push the status=okay to the evk file (because we already describe the PCIe switch there) and only keep the supplies here (because they differ) Konrad