[PATCH v3 19/27] drm/msm/dpu: invert the order of UBWC checks

Dmitry Baryshkov
2026-03-12T13:30:06Z

Unlike other drivers, the DPU driver checks for exact UBWC version,
making it hard to add minor versions if necessary. Invert the order of
UBWC checks, letting the DPU driver handle new minors transparently.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 36 ++++++++++++++---------------
1 file changed, 18 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
index 6089a58074ac..b5e50fc1916f 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
@@ -310,35 +310,35 @@ void dpu_hw_setup_format_impl(struct dpu_sw_pipe *pipe, const struct msm_format

if (fmt->fetch_mode != MDP_FETCH_LINEAR) {
u32 hbb = ctx->ubwc->highest_bank_bit - 13;
- u32 ctrl_val;
+ u32 ctrl_val = 0;

if (MSM_FORMAT_IS_UBWC(fmt))
opmode |= MDSS_MDP_OP_BWC_EN;
src_format |= (fmt->fetch_mode & 3) << 30; /*FRAME_FORMAT */

- if (ctx->ubwc->ubwc_enc_version == UBWC_1_0) {
+ if (ctx->ubwc->ubwc_enc_version > UBWC_6_0) {
+ DRM_WARN_ONCE("Unsupported UBWC version %x\n", ctx->ubwc->ubwc_enc_version);
+ } else if (ctx->ubwc->ubwc_enc_version >= UBWC_5_0) {
+ if (!MSM_FORMAT_IS_YUV(fmt)) {
+ ctrl_val = BIT(30);
+ if (!MSM_FORMAT_IS_DX(fmt)) /* and not FP16, but it's unsupported */
+ ctrl_val |= BIT(31);
+ }
+ /* SDE also sets bits for lossy formats, but we don't support them yet */
+ } else if (ctx->ubwc->ubwc_enc_version >= UBWC_4_0) {
+ ctrl_val = MSM_FORMAT_IS_YUV(fmt) ? 0 : BIT(30);
+ } else if (ctx->ubwc->ubwc_enc_version >= UBWC_3_0) {
+ ctrl_val = BIT(30) | qcom_ubwc_swizzle(ctx->ubwc) | (hbb << 4);
+ } else if (ctx->ubwc->ubwc_enc_version >= UBWC_2_0) {
+ fast_clear = fmt->alpha_enable ? BIT(31) : 0;
+ ctrl_val = fast_clear | qcom_ubwc_swizzle(ctx->ubwc) | (hbb << 4);
+ } else if (ctx->ubwc->ubwc_enc_version >= UBWC_1_0) {
fast_clear = fmt->alpha_enable ? BIT(31) : 0;
ctrl_val = fast_clear |
(qcom_ubwc_swizzle(ctx->ubwc) & UBWC_SWIZZLE_ENABLE_LVL1) |
BIT(8) | (hbb << 4);
- } else if (ctx->ubwc->ubwc_enc_version == UBWC_2_0) {
- fast_clear = fmt->alpha_enable ? BIT(31) : 0;
- ctrl_val = fast_clear | qcom_ubwc_swizzle(ctx->ubwc) | (hbb << 4);
- } else if (ctx->ubwc->ubwc_enc_version == UBWC_3_0) {
- ctrl_val = BIT(30) | qcom_ubwc_swizzle(ctx->ubwc) | (hbb << 4);
- } else if (ctx->ubwc->ubwc_enc_version == UBWC_4_0) {
- ctrl_val = MSM_FORMAT_IS_YUV(fmt) ? 0 : BIT(30);
- } else if (ctx->ubwc->ubwc_enc_version <= UBWC_6_0) {
- if (MSM_FORMAT_IS_YUV(fmt))
- ctrl_val = 0;
- else if (MSM_FORMAT_IS_DX(fmt)) /* or FP16, but it's unsupported */
- ctrl_val = BIT(30);
- else
- ctrl_val = BIT(30) | BIT(31);
- /* SDE also sets bits for lossy formats, but we don't support them yet */
} else {
DRM_WARN_ONCE("Unsupported UBWC version %x\n", ctx->ubwc->ubwc_enc_version);
- ctrl_val = 0;
}

DPU_REG_WRITE(c, ubwc_ctrl_off, ctrl_val);

--
2.47.3