From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EB5ED2837B; Wed, 10 Apr 2024 11:15:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712747734; cv=none; b=BVMYeHYdyrbTCHSFOPKse7iqJ1U2f7YPwJ34zYxF7Rzxxl0VhJl80cEN4xDFt7IFwf9rZ41L+KwRkfa+0w5BnIXqe52Uzph5+cilq0JOS/Gkvg4ZtkGRCoYnVKPZNJ8RKTxuItfpEAwnt5Azu4xuKwNHi1r+u5byfVgWwWhEork= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712747734; c=relaxed/simple; bh=PfX4TWI+G1qb9N5EwVvxA5wr+hsBVwznICnpgEc0G5g=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=HTnmojQXlnLAGLbvcvSwhO+cyNcBREPOEyiV8JVlgEAEulllOc3b0Bm1hi21tuo33UyCdM9jNUrpad2JPxHiZajuz4RWnFpEpVpDRzp8KrVT/UD7kOpuuaYPfjHPzA0iC3vEXUH0XlaQNuCGYVDYzUGPdQ4lFDWkgzOea/XaknI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=hxb/caaL; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="hxb/caaL" Received: by smtp.kernel.org (Postfix) with ESMTPSA id A0BDCC433C7; Wed, 10 Apr 2024 11:15:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1712747733; bh=PfX4TWI+G1qb9N5EwVvxA5wr+hsBVwznICnpgEc0G5g=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=hxb/caaLocQ1fxwcIc+dYWDGIC55aCRyLg2sshMGfLGF2pS5wzGvBWhrwRc3kx+6R vjDzClurl4TlhVHj3E7FGTvXI7f81SqNAKFWZNx69GKLi1GGOhYUffJdDpkpWiD6d2 rh6UsgDfcdtmdpvod79elMfjdydWlfVsL7OqMc8mMrjRryPrPlUxWVVbQ4nw0n0SJU Z5e0apz3E7U1buHm0mwBCUd3L9JsRS7mfgkvoGEZEj0pQAO/yDT3aoLZK73FkXO4iB 2qtQG2D4VU2wMDu5+USIdGxkp+fmr63nVCmCl3DgfYYBRWe3Ic/txSRayOOHChy8ny +HpPRq3v61kRw== Message-ID: <70d0afa7-4990-4180-8dfa-cdf267e4c7a2@kernel.org> Date: Wed, 10 Apr 2024 13:15:27 +0200 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v7 1/5] dt-bindings: interconnect: Add Qualcomm IPQ9574 support To: Varadarajan Narayanan Cc: andersson@kernel.org, konrad.dybcio@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, djakov@kernel.org, dmitry.baryshkov@linaro.org, quic_anusha@quicinc.com, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org References: <20240403104220.1092431-1-quic_varada@quicinc.com> <20240403104220.1092431-2-quic_varada@quicinc.com> <58c9b754-b9a7-444d-9545-9e6648010630@kernel.org> <1ec401be-11cb-416a-9eae-d72ea8acf06f@kernel.org> Content-Language: en-US From: Krzysztof Kozlowski Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 10/04/2024 12:02, Varadarajan Narayanan wrote: >> Okay, so what happens if icc-clk way of generating them changes a bit? >> It can change, why not, driver implementation is not an ABI. >> >>> >>> 2. These auto-generated id-numbers have to be correctly >>> tied to the DT nodes. Else, the relevant clocks may >>> not get enabled. >> >> Sorry, I don't get, how auto generated ID number is tied to DT node. >> What DT node? > > I meant the following usage for the 'interconnects' entry of the > consumer peripheral's node. > > interconnects = <&gcc MASTER_ANOC_PCIE0 &gcc SLAVE_ANOC_PCIE0>, > ^^^^^^^^^^^^^^^^^ ^^^^^^^^^^^^^^^^ > <&gcc MASTER_SNOC_PCIE0 &gcc SLAVE_SNOC_PCIE0>; > ^^^^^^^^^^^^^^^^^ ^^^^^^^^^^^^^^^^ > >>> Since ICC-CLK creates two ids per clock entry (one MASTER_xxx and >>> one SLAVE_xxx), using those MASTER/SLAVE_xxx macros as indices in >>> the below array would create holes. >>> >>> static int icc_ipq9574_hws[] = { >>> [MASTER_ANOC_PCIE0] = GCC_ANOC_PCIE0_1LANE_M_CLK, >>> [MASTER_SNOC_PCIE0] = GCC_SNOC_PCIE0_1LANE_S_CLK, >>> [MASTER_ANOC_PCIE1] = GCC_ANOC_PCIE1_1LANE_M_CLK, >>> [MASTER_SNOC_PCIE1] = GCC_SNOC_PCIE1_1LANE_S_CLK, >>> . . . >>> }; >>> >>> Other Qualcomm drivers don't have this issue and they can >>> directly use the MASTER/SLAVE_xxx macros. >> >> I understand, thanks, yet your last patch keeps adding fake IDs, means >> IDs which are not part of ABI. >> >>> >>> As the MASTER_xxx macros cannot be used, have to define a new set >>> of macros that can be used for indices in the above array. This >>> is the reason for the ICC_BINDING_NAME macros. >> >> Then maybe fix the driver, instead of adding something which is not an >> ABI to bindings and completely skipping the actual ABI. > > Will remove the ICC_xxx defines from the header. And in the > driver will change the declaration as follows. Will that be > acceptable? > > static int icc_ipq9574_hws[] = { > [MASTER_ANOC_PCIE0 / 2] = GCC_ANOC_PCIE0_1LANE_M_CLK, What is the binding in such case? What exactly do you bind between driver and DTS? Best regards, Krzysztof